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authorHiroshi Inoue <inouehrs@jp.ibm.com>2017-07-27 08:14:48 +0000
committerHiroshi Inoue <inouehrs@jp.ibm.com>2017-07-27 08:14:48 +0000
commit967dc58ac10552a7910fb00a31adb0d9978c632d (patch)
tree979e6fab1b8f6b1576f4adca7345c72144b3b465 /llvm/lib
parent81467738457e5fc064537a6438400a2d7b32343b (diff)
downloadbcm5719-llvm-967dc58ac10552a7910fb00a31adb0d9978c632d.tar.gz
bcm5719-llvm-967dc58ac10552a7910fb00a31adb0d9978c632d.zip
[PowerPC] enable optimizeCompareInstr for branch with static branch hint
In optimizeCompareInstr, a compare instruction is eliminated by using a record form instruction if possible. If the branch instruction that uses the result of the compare has a static branch hint, the optimization does not happen. This patch makes this optimization happen regardless of the branch hint by splitting branch hint and branch condition before checking the predicate to identify the possible optimizations. Differential Revision: https://reviews.llvm.org/D35801 llvm-svn: 309255
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h16
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.cpp22
2 files changed, 31 insertions, 7 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
index acea600fbb0..603ac960133 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h
@@ -70,6 +70,22 @@ namespace PPC {
/// Assume the condition register is set by MI(a,b), return the predicate if
/// we modify the instructions such that condition register is set by MI(b,a).
Predicate getSwappedPredicate(Predicate Opcode);
+
+ /// Return the condition without hint bits.
+ inline unsigned getPredicateCondition(Predicate Opcode) {
+ return (unsigned)(Opcode & ~BR_HINT_MASK);
+ }
+
+ /// Return the hint bits of the predicate.
+ inline unsigned getPredicateHint(Predicate Opcode) {
+ return (unsigned)(Opcode & BR_HINT_MASK);
+ }
+
+ /// Return predicate consisting of specified condition and hint bits.
+ inline Predicate getPredicate(unsigned Condition, unsigned Hint) {
+ return (Predicate)((Condition & ~BR_HINT_MASK) |
+ (Hint & BR_HINT_MASK));
+ }
}
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index e74ba38c351..d65d17beca3 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1640,8 +1640,10 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
I != IE; ++I) {
MachineInstr *UseMI = &*I;
if (UseMI->getOpcode() == PPC::BCC) {
- unsigned Pred = UseMI->getOperand(0).getImm();
- if (Pred != PPC::PRED_EQ && Pred != PPC::PRED_NE)
+ PPC::Predicate Pred = (PPC::Predicate)UseMI->getOperand(0).getImm();
+ unsigned PredCond = PPC::getPredicateCondition(Pred);
+ // We ignore hint bits when checking for non-equality comparisons.
+ if (PredCond != PPC::PRED_EQ && PredCond != PPC::PRED_NE)
return false;
} else if (UseMI->getOpcode() == PPC::ISEL ||
UseMI->getOpcode() == PPC::ISEL8) {
@@ -1695,19 +1697,23 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
MachineInstr *UseMI = &*MRI->use_instr_begin(CRReg);
if (UseMI->getOpcode() == PPC::BCC) {
PPC::Predicate Pred = (PPC::Predicate)UseMI->getOperand(0).getImm();
+ unsigned PredCond = PPC::getPredicateCondition(Pred);
+ unsigned PredHint = PPC::getPredicateHint(Pred);
int16_t Immed = (int16_t)Value;
- if (Immed == -1 && Pred == PPC::PRED_GT) {
+ // When modyfing the condition in the predicate, we propagate hint bits
+ // from the original predicate to the new one.
+ if (Immed == -1 && PredCond == PPC::PRED_GT) {
// We convert "greater than -1" into "greater than or equal to 0",
// since we are assuming signed comparison by !equalityOnly
PredsToUpdate.push_back(std::make_pair(&(UseMI->getOperand(0)),
- PPC::PRED_GE));
+ PPC::getPredicate(PPC::PRED_GE, PredHint)));
Success = true;
}
- else if (Immed == 1 && Pred == PPC::PRED_LT) {
+ else if (Immed == 1 && PredCond == PPC::PRED_LT) {
// We convert "less than 1" into "less than or equal to 0".
PredsToUpdate.push_back(std::make_pair(&(UseMI->getOperand(0)),
- PPC::PRED_LE));
+ PPC::getPredicate(PPC::PRED_LE, PredHint)));
Success = true;
}
}
@@ -1804,9 +1810,11 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
MachineInstr *UseMI = &*I;
if (UseMI->getOpcode() == PPC::BCC) {
PPC::Predicate Pred = (PPC::Predicate) UseMI->getOperand(0).getImm();
+ unsigned PredCond = PPC::getPredicateCondition(Pred);
assert((!equalityOnly ||
- Pred == PPC::PRED_EQ || Pred == PPC::PRED_NE) &&
+ PredCond == PPC::PRED_EQ || PredCond == PPC::PRED_NE) &&
"Invalid predicate for equality-only optimization");
+ (void)PredCond; // To suppress warning in release build.
PredsToUpdate.push_back(std::make_pair(&(UseMI->getOperand(0)),
PPC::getSwappedPredicate(Pred)));
} else if (UseMI->getOpcode() == PPC::ISEL ||
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