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| author | Nick Desaulniers <ndesaulniers@google.com> | 2019-04-17 22:21:10 +0000 |
|---|---|---|
| committer | Nick Desaulniers <ndesaulniers@google.com> | 2019-04-17 22:21:10 +0000 |
| commit | 9609ce2f330543fa66af49af3896c1f64d4e4f9f (patch) | |
| tree | c61b81a948539e43df57759128029c93bbc89d1f /llvm/lib | |
| parent | d51adf056863da28ce0188654c90a5f14cf6baf1 (diff) | |
| download | bcm5719-llvm-9609ce2f330543fa66af49af3896c1f64d4e4f9f.tar.gz bcm5719-llvm-9609ce2f330543fa66af49af3896c1f64d4e4f9f.zip | |
[AsmPrinter] hoist %a output template to base class for ARM+Aarch64
Summary:
X86 is quite complicated; so I intend to leave it as is. ARM+Aarch64 do
basically the same thing (Aarch64 did not correctly handle immediates,
ARM has a test llvm/test/CodeGen/ARM/2009-04-06-AsmModifier.ll that uses
%a with an immediate) for a flag that should be target independent
anyways.
Reviewers: echristo, peter.smith
Reviewed By: echristo
Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, llvm-commits, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60841
llvm-svn: 358618
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 11 |
3 files changed, 11 insertions, 18 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp index b18bd2ca426..60be9451f4b 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp @@ -601,7 +601,8 @@ void AsmPrinter::PrintSpecial(const MachineInstr *MI, raw_ostream &OS, /// PrintAsmOperand - Print the specified operand of MI, an INLINEASM /// instruction, using the specified assembler variant. Targets should -/// override this to format as appropriate. +/// override this to format as appropriate for machine specific ExtraCodes +/// or when the arch-independent handling would be too complex otherwise. bool AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) { // Does this asm operand have a single letter operand modifier? @@ -613,18 +614,24 @@ bool AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, switch (ExtraCode[0]) { default: return true; // Unknown modifier. + case 'a': // Print as memory address. + if (MO.isReg()) { + PrintAsmMemoryOperand(MI, OpNo, nullptr, O); + return false; + } + LLVM_FALLTHROUGH; // GCC allows '%a' to behave like '%c' with immediates. case 'c': // Substitute immediate value without immediate syntax - if (MO.getType() != MachineOperand::MO_Immediate) + if (!MO.isImm()) return true; O << MO.getImm(); return false; case 'n': // Negate the immediate constant. - if (MO.getType() != MachineOperand::MO_Immediate) + if (!MO.isImm()) return true; O << -MO.getImm(); return false; case 's': // The GCC deprecated s modifier - if (MO.getType() != MachineOperand::MO_Immediate) + if (!MO.isImm()) return true; O << ((32 - MO.getImm()) & 31); return false; diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index ac5bdae9f1f..591d1a8bee1 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -504,9 +504,6 @@ bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, switch (ExtraCode[0]) { default: return true; // Unknown modifier. - case 'a': // Print 'a' modifier - PrintAsmMemoryOperand(MI, OpNum, ExtraCode, O); - return false; case 'w': // Print W register case 'x': // Print X register if (MO.isReg()) diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index dd2b472f8eb..94ff8ee4099 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -264,17 +264,6 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, default: // See if this is a generic print operand return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); - case 'a': // Print as a memory address. - if (MI->getOperand(OpNum).isReg()) { - O << "[" - << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) - << "]"; - return false; - } else if (MI->getOperand(OpNum).isImm()) { - O << MI->getOperand(OpNum).getImm(); - return false; - } - return true; case 'P': // Print a VFP double precision register. case 'q': // Print a NEON quad precision register. printOperand(MI, OpNum, O); |

