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| author | Duraid Madina <duraid@octopus.com.au> | 2007-06-27 09:01:14 +0000 |
|---|---|---|
| committer | Duraid Madina <duraid@octopus.com.au> | 2007-06-27 09:01:14 +0000 |
| commit | 95759c0e78d3097c0e503f92e28ebcd19c42585d (patch) | |
| tree | a7f12de6467488fa6006d2f6a0f214eca0b8fe7c /llvm/lib | |
| parent | 89183dcc143005b241dc33bef128a2fceaefb02f (diff) | |
| download | bcm5719-llvm-95759c0e78d3097c0e503f92e28ebcd19c42585d.tar.gz bcm5719-llvm-95759c0e78d3097c0e503f92e28ebcd19c42585d.zip | |
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation)
llvm-svn: 37750
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocBigBlock.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBigBlock.cpp b/llvm/lib/CodeGen/RegAllocBigBlock.cpp index 400d72ae514..c7f23f51d4b 100644 --- a/llvm/lib/CodeGen/RegAllocBigBlock.cpp +++ b/llvm/lib/CodeGen/RegAllocBigBlock.cpp @@ -459,9 +459,23 @@ unsigned RABigBlock::chooseReg(MachineBasicBlock &MBB, MachineInstr *I, } } } + + if(PhysReg == 0) { // ok, now we're desperate. We couldn't choose + // a register to spill by looking through the + // read timetable, so now we just spill the + // first allocatable register we find. + + // for all physical regs in the RC, + for(TargetRegisterClass::iterator pReg = RC->begin(); + pReg != RC->end(); ++pReg) { + // if we find a register we can spill + if(PhysRegsUsed[*pReg]>=-1) + PhysReg = *pReg; // choose it to be spilled + } + } - assert(PhysReg && "couldn't grab a register from the table?"); - // TODO: assert that RC->contains(PhysReg) / handle aliased registers + assert(PhysReg && "couldn't choose a register to spill :( "); + // TODO: assert that RC->contains(PhysReg) / handle aliased registers? // since we needed to look in the table we need to spill this register. spillPhysReg(MBB, I, PhysReg); |

