diff options
author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-01-22 10:01:36 +0000 |
---|---|---|
committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-01-22 10:01:36 +0000 |
commit | 94cfbbab337d590403818207fd7eac617f932923 (patch) | |
tree | c115b4b690d147c124c009b01fb75c07b6665a22 /llvm/lib | |
parent | 9c26462a27f079bf0fba7aff514716a0141a341f (diff) | |
download | bcm5719-llvm-94cfbbab337d590403818207fd7eac617f932923.tar.gz bcm5719-llvm-94cfbbab337d590403818207fd7eac617f932923.zip |
Fixed a comment
llvm-svn: 226806
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4a9ae200663..6bd38ae6165 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -9497,7 +9497,7 @@ SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) { unsigned MSB = BitWidth - Imm.countLeadingZeros() - 1; unsigned NewBW = NextPowerOf2(MSB - ShAmt); EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), NewBW); - // The narowwing should be profitable, the load/store operation should be + // The narrowwing should be profitable, the load/store operation should be // legal (or custom) and the store size should be equal to the NewVT width. while (NewBW < BitWidth && (NewVT.getStoreSizeInBits() != NewBW || |