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| author | Evan Cheng <evan.cheng@apple.com> | 2011-11-09 01:57:03 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-11-09 01:57:03 +0000 |
| commit | 94307f6ba671ea78eb608cdc5d7363ddafd6c5a9 (patch) | |
| tree | cb9a9a4d4fd7fd8ec0fb922c8e876b6d20317ae6 /llvm/lib | |
| parent | c137d0d62f940f10859244b73327a7fe2e1b3f84 (diff) | |
| download | bcm5719-llvm-94307f6ba671ea78eb608cdc5d7363ddafd6c5a9.tar.gz bcm5719-llvm-94307f6ba671ea78eb608cdc5d7363ddafd6c5a9.zip | |
Hide cpu name checking in ARMSubtarget.
llvm-svn: 144154
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index a871ed7d449..4c3be89b3ec 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1080,7 +1080,7 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB, unsigned OddRegNum = TRI->getDwarfRegNum(OddReg, false); // ARM errata 602117: LDRD with base in list may result in incorrect base // register when interrupted or faulted. - bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3"; + bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3(); if (!Errata602117 && ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum)) return false; diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 5e884e00991..a35f4505507 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -191,6 +191,7 @@ protected: bool isCortexA8() const { return ARMProcFamily == CortexA8; } bool isCortexA9() const { return ARMProcFamily == CortexA9; } + bool isCortexM3() const { return CPUString == "cortex-m3"; } bool hasARMOps() const { return !NoARM; } |
