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author | Clement Courbet <courbet@google.com> | 2018-12-11 13:15:56 +0000 |
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committer | Clement Courbet <courbet@google.com> | 2018-12-11 13:15:56 +0000 |
commit | 93b344577077b9fcaddac273a5544c850f4dee12 (patch) | |
tree | 19ea450e6d0af0e16e7bf3480af4ffef165c8156 /llvm/lib | |
parent | 4b59a1fe29e1336937f9869f24dac293f7c61891 (diff) | |
download | bcm5719-llvm-93b344577077b9fcaddac273a5544c850f4dee12.tar.gz bcm5719-llvm-93b344577077b9fcaddac273a5544c850f4dee12.zip |
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
Summary:
All targets either just return false here or properly model `Fast`, so I
don't think there is any reason to prevent CodeGen from doing the right
thing here.
Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D55365
llvm-svn: 348843
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 01364944b22..b9afcc13b3d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5395,12 +5395,10 @@ static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, // If the new VT cannot cover all of the remaining bits, then consider // issuing a (or a pair of) unaligned and overlapping load / store. - // FIXME: Only does this for 64-bit or more since we don't have proper - // cost model for unaligned load / store. bool Fast; - if (NumMemOps && AllowOverlap && - VTSize >= 8 && NewVTSize < Size && - TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast) + if (NumMemOps && AllowOverlap && NewVTSize < Size && + TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && + Fast) VTSize = Size; else { VT = NewVT; |