summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorBenjamin Kramer <benny.kra@googlemail.com>2016-05-27 10:06:40 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2016-05-27 10:06:40 +0000
commit922efd7a67ad89ab32bac91f21d80c845b3c04f0 (patch)
tree212139b4f31cba84c6a32912b1fabe734fc201bb /llvm/lib
parent797fb96a9ccf76febc8024a8d92c05f76271b4ee (diff)
downloadbcm5719-llvm-922efd7a67ad89ab32bac91f21d80c845b3c04f0.tar.gz
bcm5719-llvm-922efd7a67ad89ab32bac91f21d80c845b3c04f0.zip
[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
No functional change intended. llvm-svn: 270980
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp20
-rw-r--r--llvm/lib/Target/Hexagon/HexagonBlockRanges.h5
-rw-r--r--llvm/lib/Target/Hexagon/HexagonRDF.h4
-rw-r--r--llvm/lib/Target/Hexagon/RDFCopy.cpp5
-rw-r--r--llvm/lib/Target/Hexagon/RDFCopy.h4
-rw-r--r--llvm/lib/Target/Hexagon/RDFDeadCode.h4
-rw-r--r--llvm/lib/Target/Hexagon/RDFGraph.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/RDFGraph.h4
-rw-r--r--llvm/lib/Target/Hexagon/RDFLiveness.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/RDFLiveness.h4
10 files changed, 28 insertions, 28 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp b/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
index 1f6d3625ea2..5c44029dc6e 100644
--- a/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
@@ -437,8 +437,8 @@ HexagonBlockRanges::RegToRangeMap HexagonBlockRanges::computeDeadMap(
return DeadMap;
}
-
-raw_ostream &operator<< (raw_ostream &OS, HexagonBlockRanges::IndexType Idx) {
+raw_ostream &llvm::operator<<(raw_ostream &OS,
+ HexagonBlockRanges::IndexType Idx) {
if (Idx == HexagonBlockRanges::IndexType::None)
return OS << '-';
if (Idx == HexagonBlockRanges::IndexType::Entry)
@@ -449,23 +449,23 @@ raw_ostream &operator<< (raw_ostream &OS, HexagonBlockRanges::IndexType Idx) {
}
// A mapping to translate between instructions and their indices.
-raw_ostream &operator<< (raw_ostream &OS,
- const HexagonBlockRanges::IndexRange &IR) {
+raw_ostream &llvm::operator<<(raw_ostream &OS,
+ const HexagonBlockRanges::IndexRange &IR) {
OS << '[' << IR.start() << ':' << IR.end() << (IR.TiedEnd ? '}' : ']');
if (IR.Fixed)
OS << '!';
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const HexagonBlockRanges::RangeList &RL) {
+raw_ostream &llvm::operator<<(raw_ostream &OS,
+ const HexagonBlockRanges::RangeList &RL) {
for (auto &R : RL)
OS << R << " ";
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const HexagonBlockRanges::InstrIndexMap &M) {
+raw_ostream &llvm::operator<<(raw_ostream &OS,
+ const HexagonBlockRanges::InstrIndexMap &M) {
for (auto &In : M.Block) {
HexagonBlockRanges::IndexType Idx = M.getIndex(&In);
OS << Idx << (Idx == M.Last ? ". " : " ") << In;
@@ -473,8 +473,8 @@ raw_ostream &operator<< (raw_ostream &OS,
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const HexagonBlockRanges::PrintRangeMap &P) {
+raw_ostream &llvm::operator<<(raw_ostream &OS,
+ const HexagonBlockRanges::PrintRangeMap &P) {
for (auto &I : P.Map) {
const HexagonBlockRanges::RangeList &RL = I.second;
OS << PrintReg(I.first.Reg, &P.TRI, I.first.Sub) << " -> " << RL << "\n";
diff --git a/llvm/lib/Target/Hexagon/HexagonBlockRanges.h b/llvm/lib/Target/Hexagon/HexagonBlockRanges.h
index a7f8fd2c8dd..9c3f938f99e 100644
--- a/llvm/lib/Target/Hexagon/HexagonBlockRanges.h
+++ b/llvm/lib/Target/Hexagon/HexagonBlockRanges.h
@@ -28,9 +28,6 @@ namespace llvm {
class TargetRegisterClass;
class TargetRegisterInfo;
class Type;
-}
-
-using namespace llvm;
struct HexagonBlockRanges {
HexagonBlockRanges(MachineFunction &MF);
@@ -237,4 +234,6 @@ raw_ostream &operator<< (raw_ostream &OS,
raw_ostream &operator<< (raw_ostream &OS,
const HexagonBlockRanges::PrintRangeMap &P);
+} // namespace llvm
+
#endif
diff --git a/llvm/lib/Target/Hexagon/HexagonRDF.h b/llvm/lib/Target/Hexagon/HexagonRDF.h
index 00c1889e8eb..9a63150c377 100644
--- a/llvm/lib/Target/Hexagon/HexagonRDF.h
+++ b/llvm/lib/Target/Hexagon/HexagonRDF.h
@@ -13,7 +13,6 @@
namespace llvm {
class TargetRegisterInfo;
-}
namespace rdf {
struct HexagonRegisterAliasInfo : public RegisterAliasInfo {
@@ -22,7 +21,8 @@ namespace rdf {
bool covers(RegisterRef RA, RegisterRef RR) const override;
bool covers(const RegisterSet &RRs, RegisterRef RR) const override;
};
-}
+} // namespace rdf
+} // namespace llvm
#endif
diff --git a/llvm/lib/Target/Hexagon/RDFCopy.cpp b/llvm/lib/Target/Hexagon/RDFCopy.cpp
index c777878df30..61a83dada21 100644
--- a/llvm/lib/Target/Hexagon/RDFCopy.cpp
+++ b/llvm/lib/Target/Hexagon/RDFCopy.cpp
@@ -18,15 +18,14 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
+using namespace llvm;
+using namespace rdf;
#ifndef NDEBUG
static cl::opt<unsigned> CpLimit("rdf-cp-limit", cl::init(0), cl::Hidden);
static unsigned CpCount = 0;
#endif
-using namespace llvm;
-using namespace rdf;
-
bool CopyPropagation::interpretAsCopy(const MachineInstr *MI, EqualityMap &EM) {
unsigned Opc = MI->getOpcode();
switch (Opc) {
diff --git a/llvm/lib/Target/Hexagon/RDFCopy.h b/llvm/lib/Target/Hexagon/RDFCopy.h
index 6a3ac67fbbc..e8a576cf57a 100644
--- a/llvm/lib/Target/Hexagon/RDFCopy.h
+++ b/llvm/lib/Target/Hexagon/RDFCopy.h
@@ -18,7 +18,6 @@ namespace llvm {
class MachineBasicBlock;
class MachineDominatorTree;
class MachineInstr;
-}
namespace rdf {
struct CopyPropagation {
@@ -49,6 +48,7 @@ namespace rdf {
void updateMap(NodeAddr<InstrNode*> IA);
bool scanBlock(MachineBasicBlock *B);
};
-}
+} // namespace rdf
+} // namespace llvm
#endif
diff --git a/llvm/lib/Target/Hexagon/RDFDeadCode.h b/llvm/lib/Target/Hexagon/RDFDeadCode.h
index 3131c5a41f2..8977e730b85 100644
--- a/llvm/lib/Target/Hexagon/RDFDeadCode.h
+++ b/llvm/lib/Target/Hexagon/RDFDeadCode.h
@@ -30,7 +30,6 @@
namespace llvm {
class MachineRegisterInfo;
-}
namespace rdf {
struct DeadCodeElimination {
@@ -62,6 +61,7 @@ namespace rdf {
void processDef(NodeAddr<DefNode*> DA, SetQueue<NodeId> &WorkQ);
void processUse(NodeAddr<UseNode*> UA, SetQueue<NodeId> &WorkQ);
};
-}
+} // namespace rdf
+} // namespace llvm
#endif
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.cpp b/llvm/lib/Target/Hexagon/RDFGraph.cpp
index ce3cf7b7611..273d6b7cb0c 100644
--- a/llvm/lib/Target/Hexagon/RDFGraph.cpp
+++ b/llvm/lib/Target/Hexagon/RDFGraph.cpp
@@ -25,6 +25,7 @@ using namespace rdf;
// Printing functions. Have them here first, so that the rest of the code
// can use them.
+namespace llvm {
namespace rdf {
template<>
@@ -298,6 +299,7 @@ raw_ostream &operator<< (raw_ostream &OS,
}
} // namespace rdf
+} // namespace llvm
// Node allocation functions.
//
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.h b/llvm/lib/Target/Hexagon/RDFGraph.h
index 43eeb483173..49b05374126 100644
--- a/llvm/lib/Target/Hexagon/RDFGraph.h
+++ b/llvm/lib/Target/Hexagon/RDFGraph.h
@@ -212,8 +212,6 @@
#include <set>
#include <vector>
-using namespace llvm;
-
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
@@ -223,7 +221,6 @@ namespace llvm {
class MachineDominatorTree;
class TargetInstrInfo;
class TargetRegisterInfo;
-}
namespace rdf {
typedef uint32_t NodeId;
@@ -858,5 +855,6 @@ namespace rdf {
: Print<NodeAddr<T>>(x, g) {}
};
} // namespace rdf
+} // namespace llvm
#endif // RDF_GRAPH_H
diff --git a/llvm/lib/Target/Hexagon/RDFLiveness.cpp b/llvm/lib/Target/Hexagon/RDFLiveness.cpp
index ebd5eaa778a..1c2bd2aad6d 100644
--- a/llvm/lib/Target/Hexagon/RDFLiveness.cpp
+++ b/llvm/lib/Target/Hexagon/RDFLiveness.cpp
@@ -36,6 +36,7 @@
using namespace llvm;
using namespace rdf;
+namespace llvm {
namespace rdf {
template<>
raw_ostream &operator<< (raw_ostream &OS, const Print<Liveness::RefMap> &P) {
@@ -52,7 +53,8 @@ namespace rdf {
OS << " }";
return OS;
}
-}
+} // namespace rdf
+} // namespace llvm
// The order in the returned sequence is the order of reaching defs in the
// upward traversal: the first def is the closest to the given reference RefA,
diff --git a/llvm/lib/Target/Hexagon/RDFLiveness.h b/llvm/lib/Target/Hexagon/RDFLiveness.h
index 0705b401921..2b49c7488ce 100644
--- a/llvm/lib/Target/Hexagon/RDFLiveness.h
+++ b/llvm/lib/Target/Hexagon/RDFLiveness.h
@@ -26,7 +26,6 @@ namespace llvm {
class TargetRegisterInfo;
class MachineDominatorTree;
class MachineDominanceFrontier;
-}
namespace rdf {
struct Liveness {
@@ -105,6 +104,7 @@ namespace rdf {
void traverse(MachineBasicBlock *B, RefMap &LiveIn);
void emptify(RefMap &M);
};
-}
+} // namespace rdf
+} // namespace llvm
#endif // RDF_LIVENESS_H
OpenPOWER on IntegriCloud