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| author | Craig Topper <craig.topper@gmail.com> | 2017-01-21 06:59:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-01-21 06:59:38 +0000 |
| commit | 8e0724d33206c15061a0be2ff5c66c7e6b304d13 (patch) | |
| tree | e320bda503fc7dcb25b249ac5c3dcf774857ad34 /llvm/lib | |
| parent | b6b909771d6a1b0fa59c53e17b692b5cfe5ad1d3 (diff) | |
| download | bcm5719-llvm-8e0724d33206c15061a0be2ff5c66c7e6b304d13.tar.gz bcm5719-llvm-8e0724d33206c15061a0be2ff5c66c7e6b304d13.zip | |
[X86] Don't allow commuting to form phsub operations.
Fixes PR31714.
llvm-svn: 292713
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 0d65c277725..d1e4846928c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33864,11 +33864,11 @@ static SDValue combineSub(SDNode *N, SelectionDAG &DAG, } } - // Try to synthesize horizontal adds from adds of shuffles. + // Try to synthesize horizontal subs from subs of shuffles. EVT VT = N->getValueType(0); if (((Subtarget.hasSSSE3() && (VT == MVT::v8i16 || VT == MVT::v4i32)) || (Subtarget.hasInt256() && (VT == MVT::v16i16 || VT == MVT::v8i32))) && - isHorizontalBinOp(Op0, Op1, true)) + isHorizontalBinOp(Op0, Op1, false)) return DAG.getNode(X86ISD::HSUB, SDLoc(N), VT, Op0, Op1); return OptimizeConditionalInDecrement(N, DAG); |
