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| author | Dan Gohman <gohman@apple.com> | 2008-04-12 02:35:39 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-04-12 02:35:39 +0000 |
| commit | 8c7cf88f7ea574d5c3831e0c50655e5ab60af85d (patch) | |
| tree | f1696fdd7396a48b8fa494a509c28f9c4aa7b0d9 /llvm/lib | |
| parent | dfd52220d7c384e8a31bdc5f0540b9b4cf9b69e3 (diff) | |
| download | bcm5719-llvm-8c7cf88f7ea574d5c3831e0c50655e5ab60af85d.tar.gz bcm5719-llvm-8c7cf88f7ea574d5c3831e0c50655e5ab60af85d.zip | |
Fix a bug that prevented x86-64 from using rep.movsq for
8-byte-aligned data.
llvm-svn: 49571
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1ab272781b2..66384f921c2 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4621,7 +4621,7 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) { ValReg = X86::EAX; Val = (Val << 8) | Val; Val = (Val << 16) | Val; - if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) { // QWORD aligned + if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned AVT = MVT::i64; ValReg = X86::RAX; Val = (Val << 32) | Val; @@ -4740,7 +4740,7 @@ SDOperand X86TargetLowering::LowerMEMCPYInline(SDOperand Chain, break; case 0: // DWORD aligned AVT = MVT::i32; - if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) // QWORD aligned + if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) // QWORD aligned AVT = MVT::i64; break; default: // Byte aligned |
