diff options
| author | Craig Topper <craig.topper@intel.com> | 2020-02-06 13:10:32 -0800 |
|---|---|---|
| committer | Hans Wennborg <hans@chromium.org> | 2020-02-10 14:14:40 +0100 |
| commit | 8b8a4834a4b8aaff751c95e458d7a01ceae081a2 (patch) | |
| tree | a992c0bf5cd73c337df7f87ec268869dff77676c /llvm/lib | |
| parent | 3f4ba96a59a9329ce819f735550882519a4f6cb5 (diff) | |
| download | bcm5719-llvm-8b8a4834a4b8aaff751c95e458d7a01ceae081a2.tar.gz bcm5719-llvm-8b8a4834a4b8aaff751c95e458d7a01ceae081a2.zip | |
[X86] Use MVT::i8 instead of MVT::i64 for shift amount in BuildSDIVPow2
X86 uses i8 for shift amounts. This code can fail on a 32-bit target
if it runs after type legalization.
This code was copied from AArch64 and modified for X86, but the
shift amount wasn't changed to the correct type for X86.
Fixes PR44812
(cherry picked from commit ec9a94af4d5fb3270f2451fcbec5a3a99f4ac03a)
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 0f152968ddf..cbdd7135de4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21056,7 +21056,7 @@ X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, // Divide by pow2. SDValue SRA = - DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i64)); + DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i8)); // If we're dividing by a positive value, we're done. Otherwise, we must // negate the result. |
