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| author | Jinsong Ji <jji@us.ibm.com> | 2019-06-20 21:36:06 +0000 |
|---|---|---|
| committer | Jinsong Ji <jji@us.ibm.com> | 2019-06-20 21:36:06 +0000 |
| commit | 8b1abe568e642e8fd1b9fe466a864fa133b5e0e1 (patch) | |
| tree | 80a25dfb49c653dc37a1a8d7b79920a7cd0f43fe /llvm/lib | |
| parent | bcdbc9a1157ee21f82fb34f9dfe539e0c94577f5 (diff) | |
| download | bcm5719-llvm-8b1abe568e642e8fd1b9fe466a864fa133b5e0e1.tar.gz bcm5719-llvm-8b1abe568e642e8fd1b9fe466a864fa133b5e0e1.zip | |
[PowerPC][NFC] Fix comments for AltVSXFMARel mapping.
llvm-svn: 363987
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC.td | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td index d55dc40d9a6..03522adc529 100644 --- a/llvm/lib/Target/PowerPC/PPC.td +++ b/llvm/lib/Target/PowerPC/PPC.td @@ -295,10 +295,9 @@ def getNonRecordFormOpcode : InstrMapping { def getAltVSXFMAOpcode : InstrMapping { let FilterClass = "AltVSXFMARel"; - // Instructions with the same BaseName and Interpretation64Bit values - // form a row. + // Instructions with the same BaseName value form a row. let RowFields = ["BaseName"]; - // Instructions with the same RC value form a column. + // Instructions with the same IsVSXFMAAlt value form a column. let ColFields = ["IsVSXFMAAlt"]; // The key column are the (default) addend-killing instructions. let KeyCol = ["0"]; |
