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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-24 13:39:13 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-24 13:39:13 +0000 |
| commit | 8ad91261e872d676f8ac2a093420b25b05c8ee6b (patch) | |
| tree | 7a95f6a6d9d5fa1708dcf320e58a2855088b2063 /llvm/lib | |
| parent | 17ad62be94de44f04475e47f1d8a783a59a591c5 (diff) | |
| download | bcm5719-llvm-8ad91261e872d676f8ac2a093420b25b05c8ee6b.tar.gz bcm5719-llvm-8ad91261e872d676f8ac2a093420b25b05c8ee6b.zip | |
[X86][SSE] combineSubToSubus - support v8i32 handling from SSSE3 (not SSE41)
Now that UMIN etc are Legal/Custom for SSE2+, we can efficiently match SUBUS v8i32 cases from SSSE3 which can perform efficient truncation with PSHUFB.
llvm-svn: 326033
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9ad5c185559..14362c6392e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -37635,10 +37635,10 @@ static SDValue combineSubToSubus(SDNode *N, SelectionDAG &DAG, SDValue Op1 = N->getOperand(1); EVT VT = N->getValueType(0); - // PSUBUS is supported, starting from SSE2, but special preprocessing - // for v8i32 requires umin, which appears in SSE41. + // PSUBUS is supported, starting from SSE2, but truncation for v8i32 + // is only worth it with SSSE3 (PSHUFB). if (!(Subtarget.hasSSE2() && (VT == MVT::v16i8 || VT == MVT::v8i16)) && - !(Subtarget.hasSSE41() && (VT == MVT::v8i32)) && + !(Subtarget.hasSSSE3() && (VT == MVT::v8i32)) && !(Subtarget.hasAVX() && (VT == MVT::v32i8 || VT == MVT::v16i16)) && !(Subtarget.useBWIRegs() && (VT == MVT::v64i8 || VT == MVT::v32i16 || VT == MVT::v16i32 || VT == MVT::v8i64))) |
