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authorCraig Topper <craig.topper@intel.com>2019-08-22 16:23:35 +0000
committerCraig Topper <craig.topper@intel.com>2019-08-22 16:23:35 +0000
commit898a0e9b8495b4247ed77bb33725a153503150ed (patch)
tree0fa56e79dbd0f9d893f65b1f8a65023b8b106dbe /llvm/lib
parent51f48295cbe8fa3a44db263b528dd9f7bae7bf9a (diff)
downloadbcm5719-llvm-898a0e9b8495b4247ed77bb33725a153503150ed.tar.gz
bcm5719-llvm-898a0e9b8495b4247ed77bb33725a153503150ed.zip
[X86] Remove MCInstLower code that drops operands from some CALL and TAILJMP instructions. Add asserts to verify operand count
It appears the FIXME here was handled at some point. r159728 from 2012 seems to be at least aportion of fixing it. Differential Revision: https://reviews.llvm.org/D66570 llvm-svn: 369665
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86MCInstLower.cpp26
1 files changed, 8 insertions, 18 deletions
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index d28caed5f8e..2106387114e 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -500,20 +500,16 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
break;
}
- // TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions have register
- // inputs modeled as normal uses instead of implicit uses. As such, truncate
- // off all but the first operand (the callee). FIXME: Change isel.
+ // TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions used to have
+ // register inputs modeled as normal uses instead of implicit uses. As such,
+ // they we used to truncate off all but the first operand (the callee). This
+ // issue seems to have been fixed at some point. This assert verifies that.
case X86::TAILJMPr64:
case X86::TAILJMPr64_REX:
case X86::CALL64r:
- case X86::CALL64pcrel32: {
- unsigned Opcode = OutMI.getOpcode();
- MCOperand Saved = OutMI.getOperand(0);
- OutMI = MCInst();
- OutMI.setOpcode(Opcode);
- OutMI.addOperand(Saved);
+ case X86::CALL64pcrel32:
+ assert(OutMI.getNumOperands() == 1 && "Unexpected number of operands!");
break;
- }
case X86::EH_RETURN:
case X86::EH_RETURN64: {
@@ -552,21 +548,15 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
goto SetTailJmpOpcode;
SetTailJmpOpcode:
- MCOperand Saved = OutMI.getOperand(0);
- OutMI = MCInst();
+ assert(OutMI.getNumOperands() == 1 && "Unexpected number of operands!");
OutMI.setOpcode(Opcode);
- OutMI.addOperand(Saved);
break;
}
case X86::TAILJMPd_CC:
case X86::TAILJMPd64_CC: {
- MCOperand Saved = OutMI.getOperand(0);
- MCOperand Saved2 = OutMI.getOperand(1);
- OutMI = MCInst();
+ assert(OutMI.getNumOperands() == 2 && "Unexpected number of operands!");
OutMI.setOpcode(X86::JCC_1);
- OutMI.addOperand(Saved);
- OutMI.addOperand(Saved2);
break;
}
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