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authorDiana Picus <diana.picus@linaro.org>2016-11-15 16:42:10 +0000
committerDiana Picus <diana.picus@linaro.org>2016-11-15 16:42:10 +0000
commit895c6aa6fdd9a3c9bbaf3a00583e38318ea76253 (patch)
treecaed13b9598685a9c666f27fb218d4aff13436bc /llvm/lib
parentc7486af9c9642f0beff3b033be9b3353c035e8cd (diff)
downloadbcm5719-llvm-895c6aa6fdd9a3c9bbaf3a00583e38318ea76253.tar.gz
bcm5719-llvm-895c6aa6fdd9a3c9bbaf3a00583e38318ea76253.zip
[ARM] GlobalISel: Remove unused members. NFCI
This silences some warnings that I didn't see with my host compiler. llvm-svn: 286981
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstructionSelector.cpp5
-rw-r--r--llvm/lib/Target/ARM/ARMInstructionSelector.h5
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp2
3 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
index 5905963bcb3..69b94b6b1f4 100644
--- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
+++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -25,10 +25,9 @@ using namespace llvm;
#error "You shouldn't build this"
#endif
-ARMInstructionSelector::ARMInstructionSelector(const ARMBaseTargetMachine &TM,
- const ARMSubtarget &STI,
+ARMInstructionSelector::ARMInstructionSelector(const ARMSubtarget &STI,
const ARMRegisterBankInfo &RBI)
- : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
+ : InstructionSelector(), TII(*STI.getInstrInfo()),
TRI(*STI.getRegisterInfo()), RBI(RBI) {}
bool ARMInstructionSelector::select(llvm::MachineInstr &I) const {
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.h b/llvm/lib/Target/ARM/ARMInstructionSelector.h
index 3b32ce4746d..5072cdd60ce 100644
--- a/llvm/lib/Target/ARM/ARMInstructionSelector.h
+++ b/llvm/lib/Target/ARM/ARMInstructionSelector.h
@@ -24,15 +24,12 @@ class ARMSubtarget;
class ARMInstructionSelector : public InstructionSelector {
public:
- ARMInstructionSelector(const ARMBaseTargetMachine &TM,
- const ARMSubtarget &STI,
+ ARMInstructionSelector(const ARMSubtarget &STI,
const ARMRegisterBankInfo &RBI);
virtual bool select(MachineInstr &I) const override;
private:
- const ARMBaseTargetMachine &TM;
- const ARMSubtarget &STI;
const ARMBaseInstrInfo &TII;
const ARMBaseRegisterInfo &TRI;
const ARMRegisterBankInfo &RBI;
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index d7d7a0e8d48..7c24c2a3dfd 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -307,7 +307,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
// FIXME: At this point, we can't rely on Subtarget having RBI.
// It's awkward to mix passing RBI and the Subtarget; should we pass
// TII/TRI as well?
- GISel->InstSelector.reset(new ARMInstructionSelector(*this, *I, *RBI));
+ GISel->InstSelector.reset(new ARMInstructionSelector(*I, *RBI));
GISel->RegBankInfo.reset(RBI);
#endif
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