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authorCraig Topper <craig.topper@gmail.com>2017-03-31 20:01:16 +0000
committerCraig Topper <craig.topper@gmail.com>2017-03-31 20:01:16 +0000
commit885fa12e8a0bf02c3d4c9dc5cbe5fffdb8cc5c8b (patch)
tree0cb89509d4f84a3c1bd270ead229a55a330ce6af /llvm/lib
parent28bed106e09975d25879e3cf4390bc02f2ab9b90 (diff)
downloadbcm5719-llvm-885fa12e8a0bf02c3d4c9dc5cbe5fffdb8cc5c8b.tar.gz
bcm5719-llvm-885fa12e8a0bf02c3d4c9dc5cbe5fffdb8cc5c8b.zip
[APInt] Remove shift functions from APIntOps namespace. Replace the few users with the APInt class methods. NFCI
llvm-svn: 299248
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Analysis/ValueTracking.cpp8
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp10
2 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 6f043666cef..d4c0e7092ea 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1120,13 +1120,13 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
case Instruction::LShr: {
// (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
auto KZF = [BitWidth](const APInt &KnownZero, unsigned ShiftAmt) {
- return APIntOps::lshr(KnownZero, ShiftAmt) |
+ return KnownZero.lshr(ShiftAmt) |
// High bits known zero.
APInt::getHighBitsSet(BitWidth, ShiftAmt);
};
auto KOF = [](const APInt &KnownOne, unsigned ShiftAmt) {
- return APIntOps::lshr(KnownOne, ShiftAmt);
+ return KnownOne.lshr(ShiftAmt);
};
computeKnownBitsFromShiftOperator(I, KnownZero, KnownOne,
@@ -1137,11 +1137,11 @@ static void computeKnownBitsFromOperator(const Operator *I, APInt &KnownZero,
case Instruction::AShr: {
// (ashr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
auto KZF = [](const APInt &KnownZero, unsigned ShiftAmt) {
- return APIntOps::ashr(KnownZero, ShiftAmt);
+ return KnownZero.ashr(ShiftAmt);
};
auto KOF = [](const APInt &KnownOne, unsigned ShiftAmt) {
- return APIntOps::ashr(KnownOne, ShiftAmt);
+ return KnownOne.ashr(ShiftAmt);
};
computeKnownBitsFromShiftOperator(I, KnownZero, KnownOne,
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 09069464bb0..7182576b695 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -606,8 +606,8 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
Depth + 1))
return I;
assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
- KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
- KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
+ KnownZero = KnownZero.lshr(ShiftAmt);
+ KnownOne = KnownOne.lshr(ShiftAmt);
if (ShiftAmt)
KnownZero.setHighBits(ShiftAmt); // high bits known zero.
}
@@ -650,13 +650,13 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
APInt HighBits(APInt::getHighBitsSet(BitWidth, ShiftAmt));
- KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
- KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
+ KnownZero = KnownZero.lshr(ShiftAmt);
+ KnownOne = KnownOne.lshr(ShiftAmt);
// Handle the sign bits.
APInt SignBit(APInt::getSignBit(BitWidth));
// Adjust to where it is now in the mask.
- SignBit = APIntOps::lshr(SignBit, ShiftAmt);
+ SignBit = SignBit.lshr(ShiftAmt);
// If the input sign bit is known to be zero, or if none of the top bits
// are demanded, turn this into an unsigned shift right.
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