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authorEvan Cheng <evan.cheng@apple.com>2010-04-17 06:12:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-04-17 06:12:32 +0000
commit829c300ce07f3dadde8c212b7035565be67e050b (patch)
tree7b5251cb91b6eb77b870bf3656343322a5bf8a73 /llvm/lib
parent88534f420195038980985f3351f9f599a83ba55d (diff)
downloadbcm5719-llvm-829c300ce07f3dadde8c212b7035565be67e050b.tar.gz
bcm5719-llvm-829c300ce07f3dadde8c212b7035565be67e050b.zip
Another 80 col violation.
llvm-svn: 101620
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 1cf24d2165a..7b7f4ed162c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1385,7 +1385,8 @@ void DAGTypeLegalizer::ExpandIntRes_AssertSext(SDNode *N,
if (NVTBits < EVTBits) {
Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi,
- DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), EVTBits - NVTBits)));
+ DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(),
+ EVTBits - NVTBits)));
} else {
Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT));
// The high part replicates the sign bit of Lo, make it explicit.
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