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authorChris Lattner <sabre@nondot.org>2005-12-17 08:15:09 +0000
committerChris Lattner <sabre@nondot.org>2005-12-17 08:15:09 +0000
commit80a3875bc189bb3713b39ab043f8b1a66967af0a (patch)
tree2ce205dde2007ccac08f69905ef073bbca13ff41 /llvm/lib
parent1136b7a2e0aa3167726d8820d4b6d89581329ef2 (diff)
downloadbcm5719-llvm-80a3875bc189bb3713b39ab043f8b1a66967af0a.tar.gz
bcm5719-llvm-80a3875bc189bb3713b39ab043f8b1a66967af0a.zip
Implement ret with operand, giving us this:
int %test(int %A) { ret int %A } llvm-svn: 24773
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp35
1 files changed, 33 insertions, 2 deletions
diff --git a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index fcc07c29f5b..15a28f22ab8 100644
--- a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -139,8 +139,15 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
SelectionDAG &DAG) {
- assert(0 && "Unimp");
- abort();
+ if (Op.getValueType() == MVT::i64) {
+ SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+ DAG.getConstant(1, MVT::i32));
+ SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+ DAG.getConstant(0, MVT::i32));
+ return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
+ } else {
+ return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
+ }
}
SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
@@ -219,6 +226,30 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
switch (N->getOpcode()) {
default: break;
+ case ISD::RET: {
+ if (N->getNumOperands() == 2) {
+ SDOperand Chain = Select(N->getOperand(0)); // Token chain.
+ SDOperand Val = Select(N->getOperand(1));
+ if (N->getOperand(1).getValueType() == MVT::i32) {
+ Chain = CurDAG->getCopyToReg(Chain, V8::I0, Val);
+ } else if (N->getOperand(1).getValueType() == MVT::f32) {
+ Chain = CurDAG->getCopyToReg(Chain, V8::F0, Val);
+ } else {
+ assert(N->getOperand(1).getValueType() == MVT::f64);
+ Chain = CurDAG->getCopyToReg(Chain, V8::D0, Val);
+ }
+ return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+ } else if (N->getNumOperands() > 1) {
+ SDOperand Chain = Select(N->getOperand(0)); // Token chain.
+ assert(N->getOperand(1).getValueType() == MVT::i32 &&
+ N->getOperand(2).getValueType() == MVT::i32 &&
+ N->getNumOperands() == 3 && "Unknown two-register ret value!");
+ Chain = CurDAG->getCopyToReg(Chain, V8::I0, Select(N->getOperand(1)));
+ Chain = CurDAG->getCopyToReg(Chain, V8::I1, Select(N->getOperand(2)));
+ return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
+ }
+ break; // Generated code handles the void case.
+ }
}
return SelectCode(Op);
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