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author | Hal Finkel <hfinkel@anl.gov> | 2014-03-06 00:45:19 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-06 00:45:19 +0000 |
commit | 7f908e8ef410c0ac567e26cbefb80bf5a00781f9 (patch) | |
tree | 58defdb05d74e0a7db03d72684d61659fe3a4daf /llvm/lib | |
parent | 193084979f240d620da9a575258007f1b8eb31cf (diff) | |
download | bcm5719-llvm-7f908e8ef410c0ac567e26cbefb80bf5a00781f9.tar.gz bcm5719-llvm-7f908e8ef410c0ac567e26cbefb80bf5a00781f9.zip |
Fixup PPC Darwin i1 argument handling
Like on other targets, we need to zero_extend/truncate i1 args before copying
them to GPRs.
llvm-svn: 203045
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index dce6051b182..680112da9a8 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2777,6 +2777,10 @@ PPCTargetLowering::LowerFormalArguments_Darwin( if (GPR_idx != Num_GPR_Regs) { unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); + + if (ObjectVT == MVT::i1) + ArgVal = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgVal); + ++GPR_idx; } else { needsLoad = true; @@ -4414,6 +4418,9 @@ PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee, case MVT::i32: case MVT::i64: if (GPR_idx != NumGPRs) { + if (Arg.getValueType() == MVT::i1) + Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, PtrVT, Arg); + RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg)); } else { LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset, |