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| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-01-17 11:59:20 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-01-17 11:59:20 +0000 |
| commit | 7e7b4ac751a9c84a612f8c7a7c4924c7bd4cd8b8 (patch) | |
| tree | 41fde862c0f23b898a2b07532c18c76d382d9979 /llvm/lib | |
| parent | dfce83c8f5326f23df0897b35c67c25f6763012a (diff) | |
| download | bcm5719-llvm-7e7b4ac751a9c84a612f8c7a7c4924c7bd4cd8b8.tar.gz bcm5719-llvm-7e7b4ac751a9c84a612f8c7a7c4924c7bd4cd8b8.zip | |
Don't crash SPU BE with memory accesses with big alignmnet.
llvm-svn: 123620
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp index 2002f093866..43dcfdca6bc 100644 --- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp @@ -560,7 +560,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { assert( LN->getAddressingMode() == ISD::UNINDEXED && "we should get only UNINDEXED adresses"); // clean aligned loads can be selected as-is - if (InVT.getSizeInBits() == 128 && alignment == 16) + if (InVT.getSizeInBits() == 128 && (alignment%16) == 0) return SDValue(); // Get pointerinfos to the memory chunk(s) that contain the data to load @@ -573,7 +573,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { SDValue basePtr = LN->getBasePtr(); SDValue rotate; - if (alignment == 16) { + if ((alignment%16) == 0) { ConstantSDNode *CN; // Special cases for a known aligned load to simplify the base pointer @@ -777,7 +777,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { assert( SN->getAddressingMode() == ISD::UNINDEXED && "we should get only UNINDEXED adresses"); // clean aligned loads can be selected as-is - if (StVT.getSizeInBits() == 128 && alignment == 16) + if (StVT.getSizeInBits() == 128 && (alignment%16) == 0) return SDValue(); SDValue alignLoadVec; @@ -785,7 +785,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { SDValue the_chain = SN->getChain(); SDValue insertEltOffs; - if (alignment == 16) { + if ((alignment%16) == 0) { ConstantSDNode *CN; // Special cases for a known aligned load to simplify the base pointer // and insertion byte: |
