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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-08-03 08:14:14 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-08-03 08:14:14 +0000 |
commit | 7d80ab15935f183522fee60dcfa5d538ff8be0b9 (patch) | |
tree | a4e125d4027b96506eabf230d45d02a889726187 /llvm/lib | |
parent | 442beabbf7f5d86cb2921faf39569dd09a12a9be (diff) | |
download | bcm5719-llvm-7d80ab15935f183522fee60dcfa5d538ff8be0b9.tar.gz bcm5719-llvm-7d80ab15935f183522fee60dcfa5d538ff8be0b9.zip |
Perform bitconvert to proper type
llvm-svn: 77965
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a46ec1cf62f..298a5a83783 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1448,8 +1448,7 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); else if (VA.getLocInfo() == CCValAssign::BCvt) - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, ArgValue, - DAG.getValueType(VA.getValVT())); + ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); if (VA.isExtInLoc()) { // Handle MMX values passed in XMM regs. |