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authorArtur Pilipenko <apilipenko@azulsystems.com>2017-10-05 16:28:21 +0000
committerArtur Pilipenko <apilipenko@azulsystems.com>2017-10-05 16:28:21 +0000
commit7b15254c8fe0f5992fff9037468bca3cc61a4445 (patch)
tree47c94bb61ccc0a6548924a84fd7051c53625fd5d /llvm/lib
parentaa0835a7abce9a7cbbf706539ef4712fa05c5a37 (diff)
downloadbcm5719-llvm-7b15254c8fe0f5992fff9037468bca3cc61a4445.tar.gz
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[X86] Fix chains update when lowering BUILD_VECTOR to a vector load
The code which lowers BUILD_VECTOR of consecutive loads into a single vector load doesn't update chains properly. As a result the vector load can be reordered with the store to the same location. The current code in EltsFromConsecutiveLoads only updates the chain following the first load. The fix is to update the chains following all the loads comprising the vector. This is a fix for PR10114. Reviewed By: niravd Differential Revision: https://reviews.llvm.org/D38547 llvm-svn: 314988
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9aae58b5555..b0e0b439257 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -6540,14 +6540,20 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
}
}
- auto CreateLoad = [&DAG, &DL](EVT VT, LoadSDNode *LDBase) {
+ SmallVector<LoadSDNode *, 8> Loads;
+ for (int i = FirstLoadedElt; i <= LastLoadedElt; ++i)
+ if (LoadMask[i])
+ Loads.push_back(cast<LoadSDNode>(peekThroughBitcasts(Elts[i])));
+
+ auto CreateLoad = [&DAG, &DL, &Loads](EVT VT, LoadSDNode *LDBase) {
auto MMOFlags = LDBase->getMemOperand()->getFlags();
assert(!(MMOFlags & MachineMemOperand::MOVolatile) &&
"Cannot merge volatile loads.");
SDValue NewLd =
DAG.getLoad(VT, DL, LDBase->getChain(), LDBase->getBasePtr(),
LDBase->getPointerInfo(), LDBase->getAlignment(), MMOFlags);
- DAG.makeEquivalentMemoryOrdering(LDBase, NewLd);
+ for (auto *LD : Loads)
+ DAG.makeEquivalentMemoryOrdering(LD, NewLd);
return NewLd;
};
@@ -6612,7 +6618,8 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
LDBase->getAlignment(),
false/*isVolatile*/, true/*ReadMem*/,
false/*WriteMem*/);
- DAG.makeEquivalentMemoryOrdering(LDBase, ResNode);
+ for (auto *LD : Loads)
+ DAG.makeEquivalentMemoryOrdering(LD, ResNode);
return DAG.getBitcast(VT, ResNode);
}
}
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