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authorCraig Topper <craig.topper@intel.com>2018-03-19 00:56:12 +0000
committerCraig Topper <craig.topper@intel.com>2018-03-19 00:56:12 +0000
commit793733a6c832455c939667bf1845655fe1fc44b4 (patch)
treeeffd09f5b8594025b99a71f5c42bd6899455033b /llvm/lib
parent9b60dcb29bfb58e289cde22d26e5be3657911d1b (diff)
downloadbcm5719-llvm-793733a6c832455c939667bf1845655fe1fc44b4.tar.gz
bcm5719-llvm-793733a6c832455c939667bf1845655fe1fc44b4.zip
[X86] Use IIC_CMOV64_RR/RM on 64-bit cmov instructions.
llvm-svn: 327817
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86InstrCMovSetCC.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 8dd5e1c0626..163e68a2859 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -34,7 +34,7 @@ multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
!strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
[(set GR64:$dst,
(X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))],
- IIC_CMOV32_RR>, TB;
+ IIC_CMOV64_RR>, TB;
}
let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
@@ -55,7 +55,7 @@ multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
:RI<opc, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
!strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
[(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
- CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
+ CondNode, EFLAGS))], IIC_CMOV64_RM>, TB;
} // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
} // end multiclass
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