diff options
| author | Dan Gohman <gohman@apple.com> | 2009-04-15 00:04:23 +0000 | 
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-15 00:04:23 +0000 | 
| commit | 7913ea5e4aa7e9a3032a30393fec7738ed48ba73 (patch) | |
| tree | cfd134ce64b1c7f45bc49459bd8c6c0f64f24fcc /llvm/lib | |
| parent | e665e3cf2fdcb4fceaec299d79092772ee3a05a9 (diff) | |
| download | bcm5719-llvm-7913ea5e4aa7e9a3032a30393fec7738ed48ba73.tar.gz bcm5719-llvm-7913ea5e4aa7e9a3032a30393fec7738ed48ba73.zip | |
Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
either the source or destination is a physical h register.
This fixes sqlite3 with the post-RA scheduler enabled.
llvm-svn: 69111
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 13 | 
2 files changed, 20 insertions, 5 deletions
| diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 77955a6a426..e64b2960179 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1641,6 +1641,11 @@ X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,    return Count;  } +/// isHReg - Test if the given register is a physical h register. +static bool isHReg(unsigned Reg) { +  return Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH; +} +  bool X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB,                                  MachineBasicBlock::iterator MI,                                  unsigned DestReg, unsigned SrcReg, @@ -1658,7 +1663,12 @@ bool X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB,      } else if (DestRC == &X86::GR16RegClass) {        Opc = X86::MOV16rr;      } else if (DestRC == &X86::GR8RegClass) { -      Opc = X86::MOV8rr; +      // Copying two or from a physical H register requires a NOREX move. Otherwise +      // use a normal move. +      if (isHReg(DestReg) || isHReg(SrcReg)) +        Opc = X86::MOV8rr_NOREX; +      else +        Opc = X86::MOV8rr;      } else if (DestRC == &X86::GR64_RegClass) {        Opc = X86::MOV64rr;      } else if (DestRC == &X86::GR32_RegClass) { diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 077b4563b06..4fd3320090b 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -783,10 +783,15 @@ def MOV32mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),                  "mov{l}\t{$src, $dst|$dst, $src}",                  [(store GR32:$src, addr:$dst)]>; -// A version of MOV8mr that uses i8mem_NOREX so that it can be used for -// storing h registers, which can't be encoded when a REX prefix is present. -def MOV8mr_NOREX : I<0x88, MRMDestMem, (outs), (ins i8mem_NOREX:$dst, GR8:$src), -                   "mov{b}\t{$src, $dst|$dst, $src}  # NOREX", []>; +// Versions of MOV8rr and MOV8mr that use i8mem_NOREX and GR8_NOREX so that they +// can be used for copying and storing h registers, which can't be encoded when +// a REX prefix is present. +let neverHasSideEffects = 1 in +def MOV8rr_NOREX : I<0x88, MRMDestReg, (outs GR8_NOREX:$dst), (ins GR8_NOREX:$src), +                     "mov{b}\t{$src, $dst|$dst, $src}  # NOREX", []>; +def MOV8mr_NOREX : I<0x88, MRMDestMem, +                     (outs), (ins i8mem_NOREX:$dst, GR8_NOREX:$src), +                     "mov{b}\t{$src, $dst|$dst, $src}  # NOREX", []>;  //===----------------------------------------------------------------------===//  //  Fixed-Register Multiplication and Division Instructions... | 

