diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-08-04 21:12:13 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-08-04 21:12:13 +0000 |
| commit | 783b65b54658d2791f65a816372b54cad8c20247 (patch) | |
| tree | 7d105a488703a5de5f0c4e933fc7bf95d69fa9de /llvm/lib | |
| parent | cd450bbbe52ecede3ce3596230a777f0cc9865d7 (diff) | |
| download | bcm5719-llvm-783b65b54658d2791f65a816372b54cad8c20247.tar.gz bcm5719-llvm-783b65b54658d2791f65a816372b54cad8c20247.zip | |
Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
llvm-svn: 78104
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 1 |
3 files changed, 13 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index c6afbe93360..a81b790f9dc 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -615,12 +615,15 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineBasicBlock &MBB, return false; bool isDPR = NewOpc == ARM::FLDMD || NewOpc == ARM::FSTMD; - unsigned Offset = isAM5 - ? ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) ? ARM_AM::db : ARM_AM::ia, - true, isDPR ? 2 : 1) - : (isAM2 - ? ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift) - : Bytes); + unsigned Offset = 0; + if (isAM5) + Offset = ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) + ? ARM_AM::db + : ARM_AM::ia, true, (isDPR ? 2 : 1)); + else if (isAM2) + Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); + else + Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; if (isLd) { if (isAM5) // FLDMS, FLDMD diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index 918ca7806b4..a6e987b086b 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -101,8 +101,9 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM, bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { - // FIXME: temporarily disabling load / store optimization pass for Thumb mode. - if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb()) + // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode. + if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && + !Subtarget.isThumb1Only()) PM.add(createARMLoadStoreOptimizationPass()); if (OptLevel != CodeGenOpt::None && diff --git a/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index 4438a8c74c9..a326185c88a 100644 --- a/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -599,6 +599,7 @@ void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op, // FIXME bool isLDM = (MI->getOpcode() == ARM::LDM || MI->getOpcode() == ARM::LDM_RET || + MI->getOpcode() == ARM::t2LDM || MI->getOpcode() == ARM::t2LDM_RET); O << ARM_AM::getAMSubModeAltStr(Mode, isLDM); } else |
