summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2010-05-24 18:00:18 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-24 18:00:18 +0000
commit755d45be4329f99407b49b9dc122cbe5374876c1 (patch)
tree3bc7507539012ca487bb81af092c91cdfe774527 /llvm/lib
parentff2d118733c213009fbbf2969d816f81ba8ed83a (diff)
downloadbcm5719-llvm-755d45be4329f99407b49b9dc122cbe5374876c1.tar.gz
bcm5719-llvm-755d45be4329f99407b49b9dc122cbe5374876c1.zip
LR is in GPR, not tGPR even in Thumb1 mode.
llvm-svn: 104518
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp5
1 files changed, 1 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 21042da1a9a..768ffb9b6da 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2158,10 +2158,7 @@ SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{
}
// Return LR, which contains the return address. Mark it an implicit live-in.
- ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
- TargetRegisterClass *RC = AFI->isThumb1OnlyFunction()
- ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass;
- unsigned Reg = MF.addLiveIn(ARM::LR, RC);
+ unsigned Reg = MF.addLiveIn(ARM::LR, ARM::GPRRegisterClass);
return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT);
}
OpenPOWER on IntegriCloud