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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-12-07 11:10:03 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-12-07 11:10:03 +0000
commit74c371da7b36f869a052fea3c130d85603d8b6d4 (patch)
treee96cf82e6f5e46afc1e018892f41cfeccf9f1c7b /llvm/lib
parentbac7864a53f452ace393f0f1febaa5bdfa5d1ff5 (diff)
downloadbcm5719-llvm-74c371da7b36f869a052fea3c130d85603d8b6d4.tar.gz
bcm5719-llvm-74c371da7b36f869a052fea3c130d85603d8b6d4.zip
Fix gcc7.3 -Wparentheses warning. NFCI.
llvm-svn: 348581
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index ff3865b831a..a0af11622a4 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -2899,9 +2899,9 @@ bool HexagonInstrInfo::getMemOperandWithOffset(
const TargetRegisterInfo *TRI) const {
unsigned AccessSize = 0;
BaseOp = getBaseAndOffset(LdSt, Offset, AccessSize);
- assert(!BaseOp || BaseOp->isReg() &&
- "getMemOperandWithOffset only supports base "
- "operands of type register.");
+ assert((!BaseOp || BaseOp->isReg()) &&
+ "getMemOperandWithOffset only supports base "
+ "operands of type register.");
return BaseOp != nullptr;
}
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