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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-08 20:01:02 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-12-08 20:01:02 +0000 |
| commit | 73ce93b08b86121e3f485531d621ffd8667cbaf5 (patch) | |
| tree | 8a109df44a55ab2e472761ab30f33e886c96c328 /llvm/lib | |
| parent | 856777d8c972ef9dbf61306931447b4421c11a9e (diff) | |
| download | bcm5719-llvm-73ce93b08b86121e3f485531d621ffd8667cbaf5.tar.gz bcm5719-llvm-73ce93b08b86121e3f485531d621ffd8667cbaf5.zip | |
AMDGPU: Set IntrReadMem on memtime intrinsics
llvm-svn: 320188
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SMInstructions.td | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td index 5e72a2e8828..8f347986eb8 100644 --- a/llvm/lib/Target/AMDGPU/SMInstructions.td +++ b/llvm/lib/Target/AMDGPU/SMInstructions.td @@ -129,11 +129,8 @@ class SM_Time_Pseudo<string opName, SDPatternOperator node> : SM_Pseudo< opName, (outs SReg_64_XEXEC:$sdst), (ins), " $sdst", [(set i64:$sdst, (node))]> { let hasSideEffects = 1; - // FIXME: mayStore = ? is a workaround for tablegen bug for different - // inferred mayStore flags for the instruction pattern vs. standalone - // Pat. Each considers the other contradictory. - let mayStore = ?; - let mayLoad = ?; + let mayStore = 0; + let mayLoad = 1; let has_sbase = 0; let has_offset = 0; } |
