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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-12-08 22:06:07 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-12-08 22:06:07 +0000 |
| commit | 72cc248524da87d20830f6ddaa3c90788bb2ae7e (patch) | |
| tree | 1555db28bc74fe3877e58eeb9d703aa4e5bb44e0 /llvm/lib | |
| parent | 75e225318fc419a26c36fd24562cfa322b3efcf6 (diff) | |
| download | bcm5719-llvm-72cc248524da87d20830f6ddaa3c90788bb2ae7e.tar.gz bcm5719-llvm-72cc248524da87d20830f6ddaa3c90788bb2ae7e.zip | |
[SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
This fixes PR18150.
llvm-svn: 196735
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcISelLowering.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 707fe7b4a60..1b56757c1d6 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -1462,6 +1462,13 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM) setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); + if (Subtarget->is64Bit()) { + setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); + setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); + setOperationAction(ISD::MULHU, MVT::i64, Expand); + setOperationAction(ISD::MULHS, MVT::i64, Expand); + } + // VASTART needs to be custom lowered to use the VarArgsFrameIndex. setOperationAction(ISD::VASTART , MVT::Other, Custom); // VAARG needs to be lowered to not do unaligned accesses for doubles. |
