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| author | Chris Lattner <sabre@nondot.org> | 2006-09-13 04:45:25 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-09-13 04:45:25 +0000 |
| commit | 706dd3e0d40ebc138b2e71b1d8a8ca2c9f8fbac5 (patch) | |
| tree | 099274c2645cacd2469797b864974f54fed3655b /llvm/lib | |
| parent | 7789e938b6c0b5d983504f6e3324c3d42ba11397 (diff) | |
| download | bcm5719-llvm-706dd3e0d40ebc138b2e71b1d8a8ca2c9f8fbac5.tar.gz bcm5719-llvm-706dd3e0d40ebc138b2e71b1d8a8ca2c9f8fbac5.zip | |
Fix a regression in the 32-bit port from the 64-bit port landing.
We now compile CodeGen/X86/lea-2.ll into:
_test:
movl 4(%esp), %eax
movl 8(%esp), %ecx
leal -5(%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal (,%eax,4), %eax
addl 8(%esp), %eax
addl $4294967291, %eax
ret
llvm-svn: 30288
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 20e7edc668f..9d655b0677b 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -498,7 +498,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { if (!AM.ES && AM.JT != -1 && N.getOpcode() == ISD::Constant) { - uint64_t Val = cast<ConstantSDNode>(N)->getValue(); + int64_t Val = cast<ConstantSDNode>(N)->getSignExtended(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; @@ -513,7 +513,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, switch (N.getOpcode()) { default: break; case ISD::Constant: { - uint64_t Val = cast<ConstantSDNode>(N)->getValue(); + int64_t Val = cast<ConstantSDNode>(N)->getSignExtended(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; |
