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| author | Joerg Sonnenberger <joerg@bec.de> | 2014-08-04 21:28:22 +0000 |
|---|---|---|
| committer | Joerg Sonnenberger <joerg@bec.de> | 2014-08-04 21:28:22 +0000 |
| commit | 6c3e38522acf3e40097c0a8982b8dbd487867ad3 (patch) | |
| tree | 1ee1a88b231b12da407089b78cb491a5fd9daf4d /llvm/lib | |
| parent | 300dfcd28db7c07be9f37ee0e6222e51b05e21c5 (diff) | |
| download | bcm5719-llvm-6c3e38522acf3e40097c0a8982b8dbd487867ad3.tar.gz bcm5719-llvm-6c3e38522acf3e40097c0a8982b8dbd487867ad3.zip | |
tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs.
llvm-svn: 214784
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrFormats.td | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 23 |
2 files changed, 39 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index 8a5a60b6595..2da4257d9f7 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -422,6 +422,22 @@ class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, let B = 0; } +class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<opcode, OOL, IOL, asmstr, itin> { + bits<5> RST; + bits<5> A; + bits<1> WS; + + let Pattern = pattern; + + let Inst{6-10} = RST; + let Inst{11-15} = A; + let Inst{20} = WS; + let Inst{21-30} = xo; + let Inst{31} = 0; +} + class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 22c30b03312..70b61a5047c 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3121,6 +3121,20 @@ def TLBRE : XForm_24_eieio<31, 946, (outs), (ins), def TLBWE : XForm_24_eieio<31, 978, (outs), (ins), "tlbwe", IIC_LdStLoad, []>, Requires<[IsBookE]>; +def TLBRE2 : XForm_tlbws<31, 946, (outs gprc:$RS), (ins gprc:$A, i1imm:$WS), + "tlbre $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>; + +def TLBWE2 : XForm_tlbws<31, 978, (outs), (ins gprc:$RS, gprc:$A, i1imm:$WS), + "tlbwe $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>; + +def TLBSX2 : XForm_base_r3xo<31, 914, (outs), (ins gprc:$RST, gprc:$A, gprc:$B), + "tlbsx $RST, $A, $B", IIC_LdStLoad, []>, + Requires<[IsPPC4xx]>; +def TLBSX2D : XForm_base_r3xo<31, 914, (outs), + (ins gprc:$RST, gprc:$A, gprc:$B), + "tlbsx. $RST, $A, $B", IIC_LdStLoad, []>, + Requires<[IsPPC4xx]>, isDOT; + def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>, Requires<[IsBookE]>; def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>, @@ -3301,6 +3315,15 @@ def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>; def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>; +def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>, + Requires<[IsPPC4xx]>; +def : InstAlias<"tlbwelo $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 1)>, + Requires<[IsPPC4xx]>; + def EXTLWI : PPCAsmPseudo<"extlwi $rA, $rS, $n, $b", (ins gprc:$rA, gprc:$rS, u5imm:$n, u5imm:$b)>; def EXTLWIo : PPCAsmPseudo<"extlwi. $rA, $rS, $n, $b", |
