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| author | Ana Pazos <apazos@codeaurora.org> | 2018-08-30 19:43:19 +0000 | 
|---|---|---|
| committer | Ana Pazos <apazos@codeaurora.org> | 2018-08-30 19:43:19 +0000 | 
| commit | 6b34051b3370b409e9081345b98005cb43b0a22e (patch) | |
| tree | 082fc7e1d770df80971b9d0c6c333cd7a16e4f63 /llvm/lib | |
| parent | 6666861158de68dfdcd2eddf0433f5dbc1a3acef (diff) | |
| download | bcm5719-llvm-6b34051b3370b409e9081345b98005cb43b0a22e.tar.gz bcm5719-llvm-6b34051b3370b409e9081345b98005cb43b0a22e.zip | |
 [RISCV] Fixed SmallVector.h Assertion `idx < size()'
Summary:
RISCVAsmParser needs to handle the case the error message is of specific type, other than the generic Match_InvalidOperand, and the corresponding
operand is missing.
This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer  for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: llvm-commits, jocewei, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX
Differential Revision: https://reviews.llvm.org/D50790
llvm-svn: 341104
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 18 | 
1 files changed, 17 insertions, 1 deletions
| diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp index 831dcbce71b..3e469c89369 100644 --- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp +++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp @@ -684,7 +684,9 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,                                               bool MatchingInlineAsm) {    MCInst Inst; -  switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) { +  auto Result = +    MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm); +  switch (Result) {    default:      break;    case Match_Success: @@ -705,6 +707,20 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,      }      return Error(ErrorLoc, "invalid operand for instruction");    } +  } + +  // Handle the case when the error message is of specific type +  // other than the generic Match_InvalidOperand, and the +  // corresponding operand is missing. +  if (Result > FIRST_TARGET_MATCH_RESULT_TY) { +    SMLoc ErrorLoc = IDLoc; +    if (ErrorInfo != ~0U && ErrorInfo >= Operands.size()) +        return Error(ErrorLoc, "too few operands for instruction"); +  } + +  switch(Result) { +  default: +    break;    case Match_InvalidImmXLen:      if (isRV64()) {        SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); | 

