diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-05-12 06:06:34 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-05-12 06:06:34 +0000 |
| commit | 6a6886185bab9084599f6113eb04a1ff6e03a79b (patch) | |
| tree | 6e9024d07f799e52d79f0e3b0255b02774197f4b /llvm/lib | |
| parent | 095c9d9b7fa5834c8a40c906c5cbc5b288e240b6 (diff) | |
| download | bcm5719-llvm-6a6886185bab9084599f6113eb04a1ff6e03a79b.tar.gz bcm5719-llvm-6a6886185bab9084599f6113eb04a1ff6e03a79b.zip | |
Backing out fix for PR770. Need to re-apply it after live range splitting is possible
llvm-svn: 28236
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/LiveIntervalAnalysis.cpp | 38 |
1 files changed, 13 insertions, 25 deletions
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp index 0bff34cef29..8d51f7f9384 100644 --- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -724,12 +724,9 @@ void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) { MRegisterInfo::isPhysicalRegister(DestReg)) continue; - // If they are not of compatible register classes, we cannot join them. - bool Swap = false; - if (!compatibleRegisterClasses(SrcReg, DestReg, Swap)) { - DEBUG(std::cerr << "Register classes aren't compatible!\n"); + // If they are not of the same register class, we cannot join them. + if (differingRegisterClasses(SrcReg, DestReg)) continue; - } LiveInterval &SrcInt = getInterval(SrcReg); LiveInterval &DestInt = getInterval(DestReg); @@ -763,7 +760,7 @@ void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) { DestInt.join(SrcInt, MIDefIdx); DEBUG(std::cerr << "Joined. Result = " << DestInt << "\n"); - if (!Swap && !MRegisterInfo::isPhysicalRegister(SrcReg)) { + if (!MRegisterInfo::isPhysicalRegister(SrcReg)) { r2iMap_.erase(SrcReg); r2rMap_[SrcReg] = DestReg; } else { @@ -825,33 +822,24 @@ void LiveIntervals::joinIntervals() { std::cerr << " reg " << i << " -> reg " << r2rMap_[i] << "\n"); } -/// Return true if the two specified registers belong to same or compatible -/// register classes. The registers may be either phys or virt regs. -bool LiveIntervals::compatibleRegisterClasses(unsigned RegA, unsigned RegB, - bool &Swap) const { +/// Return true if the two specified registers belong to different register +/// classes. The registers may be either phys or virt regs. +bool LiveIntervals::differingRegisterClasses(unsigned RegA, + unsigned RegB) const { // Get the register classes for the first reg. if (MRegisterInfo::isPhysicalRegister(RegA)) { assert(MRegisterInfo::isVirtualRegister(RegB) && "Shouldn't consider two physregs!"); - return mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA); + return !mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA); } // Compare against the regclass for the second reg. - const TargetRegisterClass *RegClassA = mf_->getSSARegMap()->getRegClass(RegA); - if (MRegisterInfo::isVirtualRegister(RegB)) { - const TargetRegisterClass *RegClassB=mf_->getSSARegMap()->getRegClass(RegB); - if (RegClassA == RegClassB) - return true; - else { - if (RegClassB->hasSubRegClass(RegClassA)) { - Swap = true; - return true; - } - return RegClassA->hasSubRegClass(RegClassB); - } - } else - return RegClassA->contains(RegB); + const TargetRegisterClass *RegClass = mf_->getSSARegMap()->getRegClass(RegA); + if (MRegisterInfo::isVirtualRegister(RegB)) + return RegClass != mf_->getSSARegMap()->getRegClass(RegB); + else + return !RegClass->contains(RegB); } bool LiveIntervals::overlapsAliases(const LiveInterval *LHS, |

