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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-16 17:05:56 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-10-16 17:05:56 +0000 |
| commit | 69f86d199a3259a4c74924739f5ab482e40d3c73 (patch) | |
| tree | aa734620adf77b7bf2bb44f2811886a9364cae1b /llvm/lib | |
| parent | 8a0386654a5af64229bad2a69a965e3c191958f2 (diff) | |
| download | bcm5719-llvm-69f86d199a3259a4c74924739f5ab482e40d3c73.tar.gz bcm5719-llvm-69f86d199a3259a4c74924739f5ab482e40d3c73.zip | |
R600: Remove some dead code from the AMDILCFGStructurizer
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 192812
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/AMDILCFGStructurizer.cpp | 25 |
1 files changed, 4 insertions, 21 deletions
diff --git a/llvm/lib/Target/R600/AMDILCFGStructurizer.cpp b/llvm/lib/Target/R600/AMDILCFGStructurizer.cpp index 80190c9fd72..f88d593ef79 100644 --- a/llvm/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/llvm/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -1335,32 +1335,11 @@ int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB, // add initReg = initVal to headBlk const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32); - unsigned InitReg = - HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC); if (!MigrateTrue || !MigrateFalse) llvm_unreachable("Extra register needed to handle CFG"); int NumNewBlk = 0; - if (!LandBlk) { - LandBlk = HeadMBB->getParent()->CreateMachineBasicBlock(); - HeadMBB->getParent()->push_back(LandBlk); //insert to function - - if (TrueMBB) { - TrueMBB->addSuccessor(LandBlk); - } else { - HeadMBB->addSuccessor(LandBlk); - } - - if (FalseMBB) { - FalseMBB->addSuccessor(LandBlk); - } else { - HeadMBB->addSuccessor(LandBlk); - } - - NumNewBlk ++; - } - bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2); //insert AMDGPU::ENDIF to avoid special case "input landBlk == NULL" @@ -1375,6 +1354,10 @@ int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB, CmpResReg, DebugLoc()); } + // XXX: We are running this after RA, so creating virtual registers will + // cause an assertion failure in the PostRA scheduling pass. + unsigned InitReg = + HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC); insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET, InitReg, DebugLoc()); |

