[TargetParser] Use enum classes for various ARM kind enums.

Summary:
Using c++11 enum classes ensures that only valid enum values are used
for ArchKind, ProfileKind, VersionKind and ISAKind. This removes the
need for checks that the provided values map to a proper enum value,
allows us to get rid of AK_LAST and prevents comparing values from
different enums. It also removes a bunch of static_cast
from unsigned to enum values and vice versa, at the cost of introducing
static casts to access AArch64ARCHNames and ARMARCHNames by ArchKind.

FPUKind and ArchExtKind are the only remaining old-style enum in
TargetParser.h. I think it's beneficial to keep ArchExtKind as old-style
enum, but FPUKind can be converted too, but this patch is quite big, so
could do this in a follow-up patch. I could also split this patch up a
bit, if people would prefer that.

Reviewers: rengolin, javed.absar, chandlerc, rovka

Reviewed By: rovka

Subscribers: aemerson, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D35882

llvm-svn: 309287

9 files changed, 271 insertions, 259 deletions

diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp
index e8ef1d2fd8b..b855c9c18e3 100644
--- a/llvm/lib/Support/TargetParser.cpp
+++ b/llvm/lib/Support/TargetParser.cpp
@@ -75,7 +75,7 @@ template <typename T> struct ArchNames {
 ArchNames<ARM::ArchKind> ARCHNames[] = {
 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)       \
   {NAME, sizeof(NAME) - 1, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH,       \
-   sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ID, ARCH_ATTR},
+   sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ARM::ArchKind::ID, ARCH_ATTR},
 #include "llvm/Support/ARMTargetParser.def"
 };
 
@@ -137,7 +137,7 @@ template <typename T> struct CpuNames {
 };
 CpuNames<ARM::ArchKind> CPUNames[] = {
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
-  { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
+  { NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT },
 #include "llvm/Support/ARMTargetParser.def"
 };
 
@@ -153,33 +153,33 @@ CpuNames<AArch64::ArchKind> AArch64CPUNames[] = {
 // Information by ID
 // ======================================================= //
 
-StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
+StringRef ARM::getFPUName(unsigned FPUKind) {
   if (FPUKind >= ARM::FK_LAST)
     return StringRef();
   return FPUNames[FPUKind].getName();
 }
 
-unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
+FPUVersion ARM::getFPUVersion(unsigned FPUKind) {
   if (FPUKind >= ARM::FK_LAST)
-    return 0;
+    return FPUVersion::NONE;
   return FPUNames[FPUKind].FPUVersion;
 }
 
-unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
+ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
   if (FPUKind >= ARM::FK_LAST)
-    return 0;
+    return ARM::NeonSupportLevel::None;
   return FPUNames[FPUKind].NeonSupport;
 }
 
-unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
+ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
   if (FPUKind >= ARM::FK_LAST)
-    return 0;
+    return ARM::FPURestriction::None;
   return FPUNames[FPUKind].Restriction;
 }
 
-unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::ARM::getDefaultFPU(StringRef CPU, ArchKind AK) {
   if (CPU == "generic")
-    return ARCHNames[ArchKind].DefaultFPU;
+    return ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
 
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
@@ -188,13 +188,14 @@ unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
     .Default(ARM::FK_INVALID);
 }
 
-unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, ArchKind AK) {
   if (CPU == "generic")
-    return ARCHNames[ArchKind].ArchBaseExtensions;
+    return ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
-    .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
+    .Case(NAME, ARCHNames[static_cast<unsigned>(ARM::ArchKind::ID)]\
+            .ArchBaseExtensions | DEFAULT_EXT)
 #include "llvm/Support/ARMTargetParser.def"
     .Default(ARM::AEK_INVALID);
 }
@@ -246,15 +247,15 @@ bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
   // fp-only-sp and d16 subtarget features are independent of each other, so we
   // must enable/disable both.
   switch (FPUNames[FPUKind].Restriction) {
-  case ARM::FR_SP_D16:
+  case ARM::FPURestriction::SP_D16:
     Features.push_back("+fp-only-sp");
     Features.push_back("+d16");
     break;
-  case ARM::FR_D16:
+  case ARM::FPURestriction::D16:
     Features.push_back("-fp-only-sp");
     Features.push_back("+d16");
     break;
-  case ARM::FR_None:
+  case ARM::FPURestriction::None:
     Features.push_back("-fp-only-sp");
     Features.push_back("-d16");
     break;
@@ -265,33 +266,33 @@ bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
   // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
   // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
   switch (FPUNames[FPUKind].FPUVersion) {
-  case ARM::FV_VFPV5:
+  case ARM::FPUVersion::VFPV5:
     Features.push_back("+fp-armv8");
     break;
-  case ARM::FV_VFPV4:
+  case ARM::FPUVersion::VFPV4:
     Features.push_back("+vfp4");
     Features.push_back("-fp-armv8");
     break;
-  case ARM::FV_VFPV3_FP16:
+  case ARM::FPUVersion::VFPV3_FP16:
     Features.push_back("+vfp3");
     Features.push_back("+fp16");
     Features.push_back("-vfp4");
     Features.push_back("-fp-armv8");
     break;
-  case ARM::FV_VFPV3:
+  case ARM::FPUVersion::VFPV3:
     Features.push_back("+vfp3");
     Features.push_back("-fp16");
     Features.push_back("-vfp4");
     Features.push_back("-fp-armv8");
     break;
-  case ARM::FV_VFPV2:
+  case ARM::FPUVersion::VFPV2:
     Features.push_back("+vfp2");
     Features.push_back("-vfp3");
     Features.push_back("-fp16");
     Features.push_back("-vfp4");
     Features.push_back("-fp-armv8");
     break;
-  case ARM::FV_NONE:
+  case ARM::FPUVersion::NONE:
     Features.push_back("-vfp2");
     Features.push_back("-vfp3");
     Features.push_back("-fp16");
@@ -302,15 +303,15 @@ bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
 
   // crypto includes neon, so we handle this similarly to FPU version.
   switch (FPUNames[FPUKind].NeonSupport) {
-  case ARM::NS_Crypto:
+  case ARM::NeonSupportLevel::Crypto:
     Features.push_back("+neon");
     Features.push_back("+crypto");
     break;
-  case ARM::NS_Neon:
+  case ARM::NeonSupportLevel::Neon:
     Features.push_back("+neon");
     Features.push_back("-crypto");
     break;
-  case ARM::NS_None:
+  case ARM::NeonSupportLevel::None:
     Features.push_back("-neon");
     Features.push_back("-crypto");
     break;
@@ -319,28 +320,20 @@ bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
   return true;
 }
 
-StringRef llvm::ARM::getArchName(unsigned ArchKind) {
-  if (ArchKind >= ARM::AK_LAST)
-    return StringRef();
-  return ARCHNames[ArchKind].getName();
+StringRef llvm::ARM::getArchName(ArchKind AK) {
+  return ARCHNames[static_cast<unsigned>(AK)].getName();
 }
 
-StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
-  if (ArchKind == ARM::AK_INVALID || ArchKind >= ARM::AK_LAST)
-    return StringRef();
-  return ARCHNames[ArchKind].getCPUAttr();
+StringRef llvm::ARM::getCPUAttr(ArchKind AK) {
+  return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
 }
 
-StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
-  if (ArchKind == ARM::AK_INVALID || ArchKind >= ARM::AK_LAST)
-    return StringRef();
-  return ARCHNames[ArchKind].getSubArch();
+StringRef llvm::ARM::getSubArch(ArchKind AK) {
+  return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
 }
 
-unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
-  if (ArchKind >= ARM::AK_LAST)
-    return ARMBuildAttrs::CPUArch::Pre_v4;
-  return ARCHNames[ArchKind].ArchAttr;
+unsigned llvm::ARM::getArchAttr(ArchKind AK) {
+  return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
 }
 
 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
@@ -376,8 +369,8 @@ StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
 }
 
 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
-  unsigned AK = parseArch(Arch);
-  if (AK == ARM::AK_INVALID)
+  ArchKind AK = parseArch(Arch);
+  if (AK == ARM::ArchKind::INVALID)
     return StringRef();
 
   // Look for multiple AKs to find the default for pair AK+Name.
@@ -394,21 +387,21 @@ StringRef llvm::AArch64::getFPUName(unsigned FPUKind) {
   return ARM::getFPUName(FPUKind);
 }
 
-unsigned llvm::AArch64::getFPUVersion(unsigned FPUKind) {
+ARM::FPUVersion AArch64::getFPUVersion(unsigned FPUKind) {
   return ARM::getFPUVersion(FPUKind);
 }
 
-unsigned llvm::AArch64::getFPUNeonSupportLevel(unsigned FPUKind) {
+ARM::NeonSupportLevel AArch64::getFPUNeonSupportLevel(unsigned FPUKind) {
   return ARM::getFPUNeonSupportLevel( FPUKind);
 }
 
-unsigned llvm::AArch64::getFPURestriction(unsigned FPUKind) {
+ARM::FPURestriction AArch64::getFPURestriction(unsigned FPUKind) {
   return ARM::getFPURestriction(FPUKind);
 }
 
-unsigned llvm::AArch64::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::AArch64::getDefaultFPU(StringRef CPU, ArchKind AK) {
   if (CPU == "generic")
-    return AArch64ARCHNames[ArchKind].DefaultFPU;
+    return AArch64ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
 
   return StringSwitch<unsigned>(CPU)
 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
@@ -417,14 +410,15 @@ unsigned llvm::AArch64::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
     .Default(ARM::FK_INVALID);
 }
 
-unsigned llvm::AArch64::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::AArch64::getDefaultExtensions(StringRef CPU, ArchKind AK) {
   if (CPU == "generic")
-    return AArch64ARCHNames[ArchKind].ArchBaseExtensions;
+    return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 
   return StringSwitch<unsigned>(CPU)
 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
   .Case(NAME,                                                                  \
-        AArch64ARCHNames[(unsigned)AArch64::ArchKind::ID].ArchBaseExtensions | \
+        AArch64ARCHNames[static_cast<unsigned>(AArch64::ArchKind::ID)] \
+            .ArchBaseExtensions | \
             DEFAULT_EXT)
 #include "llvm/Support/AArch64TargetParser.def"
     .Default(AArch64::AEK_INVALID);
@@ -463,41 +457,30 @@ bool llvm::AArch64::getFPUFeatures(unsigned FPUKind,
   return ARM::getFPUFeatures(FPUKind, Features);
 }
 
-bool llvm::AArch64::getArchFeatures(unsigned ArchKind,
-                                     std::vector<StringRef> &Features) {
-  if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_1A))
+bool llvm::AArch64::getArchFeatures(AArch64::ArchKind AK,
+                                    std::vector<StringRef> &Features) {
+  if (AK == AArch64::ArchKind::ARMV8_1A)
     Features.push_back("+v8.1a");
-  if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_2A))
+  if (AK == AArch64::ArchKind::ARMV8_2A)
     Features.push_back("+v8.2a");
 
-  return ArchKind > static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) &&
-         ArchKind < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
+  return AK != AArch64::ArchKind::INVALID;
 }
 
-StringRef llvm::AArch64::getArchName(unsigned ArchKind) {
-  if (ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
-    return StringRef();
-  return AArch64ARCHNames[ArchKind].getName();
+StringRef llvm::AArch64::getArchName(ArchKind AK) {
+  return AArch64ARCHNames[static_cast<unsigned>(AK)].getName();
 }
 
-StringRef llvm::AArch64::getCPUAttr(unsigned ArchKind) {
-  if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
-      ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
-    return StringRef();
-  return AArch64ARCHNames[ArchKind].getCPUAttr();
+StringRef llvm::AArch64::getCPUAttr(ArchKind AK) {
+  return AArch64ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
 }
 
-StringRef llvm::AArch64::getSubArch(unsigned ArchKind) {
-  if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
-      ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
-    return StringRef();
-  return AArch64ARCHNames[ArchKind].getSubArch();
+StringRef llvm::AArch64::getSubArch(ArchKind AK) {
+  return AArch64ARCHNames[static_cast<unsigned>(AK)].getSubArch();
 }
 
-unsigned llvm::AArch64::getArchAttr(unsigned ArchKind) {
-  if (ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
-    return ARMBuildAttrs::CPUArch::v8_A;
-  return AArch64ARCHNames[ArchKind].ArchAttr;
+unsigned llvm::AArch64::getArchAttr(ArchKind AK) {
+  return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
 }
 
 StringRef llvm::AArch64::getArchExtName(unsigned ArchExtKind) {
@@ -523,13 +506,13 @@ StringRef llvm::AArch64::getArchExtFeature(StringRef ArchExt) {
 }
 
 StringRef llvm::AArch64::getDefaultCPU(StringRef Arch) {
-  unsigned AK = parseArch(Arch);
-  if (AK == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID))
+  AArch64::ArchKind AK = parseArch(Arch);
+  if (AK == ArchKind::INVALID)
     return StringRef();
 
   // Look for multiple AKs to find the default for pair AK+Name.
   for (const auto &CPU : AArch64CPUNames)
-    if (static_cast<unsigned>(CPU.ArchID) == AK && CPU.Default)
+    if (CPU.ArchID == AK && CPU.Default)
       return CPU.getName();
 
   // If we can't find a default then target the architecture instead
@@ -662,14 +645,14 @@ unsigned llvm::ARM::parseFPU(StringRef FPU) {
 }
 
 // Allows partial match, ex. "v7a" matches "armv7a".
-unsigned llvm::ARM::parseArch(StringRef Arch) {
+ARM::ArchKind ARM::parseArch(StringRef Arch) {
   Arch = getCanonicalArchName(Arch);
   StringRef Syn = getArchSynonym(Arch);
   for (const auto A : ARCHNames) {
     if (A.getName().endswith(Syn))
       return A.ID;
   }
-  return ARM::AK_INVALID;
+  return ARM::ArchKind::INVALID;
 }
 
 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
@@ -680,110 +663,132 @@ unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
   return ARM::AEK_INVALID;
 }
 
-unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
+ARM::ArchKind llvm::ARM::parseCPUArch(StringRef CPU) {
   for (const auto C : CPUNames) {
     if (CPU == C.getName())
       return C.ArchID;
   }
-  return ARM::AK_INVALID;
+  return ARM::ArchKind::INVALID;
 }
 
 // ARM, Thumb, AArch64
-unsigned llvm::ARM::parseArchISA(StringRef Arch) {
-  return StringSwitch<unsigned>(Arch)
-      .StartsWith("aarch64", ARM::IK_AARCH64)
-      .StartsWith("arm64", ARM::IK_AARCH64)
-      .StartsWith("thumb", ARM::IK_THUMB)
-      .StartsWith("arm", ARM::IK_ARM)
-      .Default(ARM::IK_INVALID);
+ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
+  return StringSwitch<ARM::ISAKind>(Arch)
+      .StartsWith("aarch64", ARM::ISAKind::AARCH64)
+      .StartsWith("arm64", ARM::ISAKind::AARCH64)
+      .StartsWith("thumb", ARM::ISAKind::THUMB)
+      .StartsWith("arm", ARM::ISAKind::ARM)
+      .Default(ARM::ISAKind::INVALID);
 }
 
 // Little/Big endian
-unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
+ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
   if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
       Arch.startswith("aarch64_be"))
-    return ARM::EK_BIG;
+    return ARM::EndianKind::BIG;
 
   if (Arch.startswith("arm") || Arch.startswith("thumb")) {
     if (Arch.endswith("eb"))
-      return ARM::EK_BIG;
+      return ARM::EndianKind::BIG;
     else
-      return ARM::EK_LITTLE;
+      return ARM::EndianKind::LITTLE;
   }
 
   if (Arch.startswith("aarch64"))
-    return ARM::EK_LITTLE;
+    return ARM::EndianKind::LITTLE;
 
-  return ARM::EK_INVALID;
+  return ARM::EndianKind::INVALID;
 }
 
 // Profile A/R/M
-unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
+ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
   Arch = getCanonicalArchName(Arch);
   switch (parseArch(Arch)) {
-  case ARM::AK_ARMV6M:
-  case ARM::AK_ARMV7M:
-  case ARM::AK_ARMV7EM:
-  case ARM::AK_ARMV8MMainline:
-  case ARM::AK_ARMV8MBaseline:
-    return ARM::PK_M;
-  case ARM::AK_ARMV7R:
-  case ARM::AK_ARMV8R:
-    return ARM::PK_R;
-  case ARM::AK_ARMV7A:
-  case ARM::AK_ARMV7VE:
-  case ARM::AK_ARMV7K:
-  case ARM::AK_ARMV8A:
-  case ARM::AK_ARMV8_1A:
-  case ARM::AK_ARMV8_2A:
-    return ARM::PK_A;
+  case ARM::ArchKind::ARMV6M:
+  case ARM::ArchKind::ARMV7M:
+  case ARM::ArchKind::ARMV7EM:
+  case ARM::ArchKind::ARMV8MMainline:
+  case ARM::ArchKind::ARMV8MBaseline:
+    return ARM::ProfileKind::M;
+  case ARM::ArchKind::ARMV7R:
+  case ARM::ArchKind::ARMV8R:
+    return ARM::ProfileKind::R;
+  case ARM::ArchKind::ARMV7A:
+  case ARM::ArchKind::ARMV7VE:
+  case ARM::ArchKind::ARMV7K:
+  case ARM::ArchKind::ARMV8A:
+  case ARM::ArchKind::ARMV8_1A:
+  case ARM::ArchKind::ARMV8_2A:
+    return ARM::ProfileKind::A;
+    LLVM_FALLTHROUGH;
+  case ARM::ArchKind::ARMV2:
+  case ARM::ArchKind::ARMV2A:
+  case ARM::ArchKind::ARMV3:
+  case ARM::ArchKind::ARMV3M:
+  case ARM::ArchKind::ARMV4:
+  case ARM::ArchKind::ARMV4T:
+  case ARM::ArchKind::ARMV5T:
+  case ARM::ArchKind::ARMV5TE:
+  case ARM::ArchKind::ARMV5TEJ:
+  case ARM::ArchKind::ARMV6:
+  case ARM::ArchKind::ARMV6K:
+  case ARM::ArchKind::ARMV6T2:
+  case ARM::ArchKind::ARMV6KZ:
+  case ARM::ArchKind::ARMV7S:
+  case ARM::ArchKind::IWMMXT:
+  case ARM::ArchKind::IWMMXT2:
+  case ARM::ArchKind::XSCALE:
+  case ARM::ArchKind::INVALID:
+    return ARM::ProfileKind::INVALID;
   }
-  return ARM::PK_INVALID;
+  llvm_unreachable("Unhandled architecture");
 }
 
 // Version number (ex. v7 = 7).
 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
   Arch = getCanonicalArchName(Arch);
   switch (parseArch(Arch)) {
-  case ARM::AK_ARMV2:
-  case ARM::AK_ARMV2A:
+  case ARM::ArchKind::ARMV2:
+  case ARM::ArchKind::ARMV2A:
     return 2;
-  case ARM::AK_ARMV3:
-  case ARM::AK_ARMV3M:
+  case ARM::ArchKind::ARMV3:
+  case ARM::ArchKind::ARMV3M:
     return 3;
-  case ARM::AK_ARMV4:
-  case ARM::AK_ARMV4T:
+  case ARM::ArchKind::ARMV4:
+  case ARM::ArchKind::ARMV4T:
     return 4;
-  case ARM::AK_ARMV5T:
-  case ARM::AK_ARMV5TE:
-  case ARM::AK_IWMMXT:
-  case ARM::AK_IWMMXT2:
-  case ARM::AK_XSCALE:
-  case ARM::AK_ARMV5TEJ:
+  case ARM::ArchKind::ARMV5T:
+  case ARM::ArchKind::ARMV5TE:
+  case ARM::ArchKind::IWMMXT:
+  case ARM::ArchKind::IWMMXT2:
+  case ARM::ArchKind::XSCALE:
+  case ARM::ArchKind::ARMV5TEJ:
     return 5;
-  case ARM::AK_ARMV6:
-  case ARM::AK_ARMV6K:
-  case ARM::AK_ARMV6T2:
-  case ARM::AK_ARMV6KZ:
-  case ARM::AK_ARMV6M:
+  case ARM::ArchKind::ARMV6:
+  case ARM::ArchKind::ARMV6K:
+  case ARM::ArchKind::ARMV6T2:
+  case ARM::ArchKind::ARMV6KZ:
+  case ARM::ArchKind::ARMV6M:
     return 6;
-  case ARM::AK_ARMV7A:
-  case ARM::AK_ARMV7VE:
-  case ARM::AK_ARMV7R:
-  case ARM::AK_ARMV7M:
-  case ARM::AK_ARMV7S:
-  case ARM::AK_ARMV7EM:
-  case ARM::AK_ARMV7K:
+  case ARM::ArchKind::ARMV7A:
+  case ARM::ArchKind::ARMV7VE:
+  case ARM::ArchKind::ARMV7R:
+  case ARM::ArchKind::ARMV7M:
+  case ARM::ArchKind::ARMV7S:
+  case ARM::ArchKind::ARMV7EM:
+  case ARM::ArchKind::ARMV7K:
     return 7;
-  case ARM::AK_ARMV8A:
-  case ARM::AK_ARMV8_1A:
-  case ARM::AK_ARMV8_2A:
-  case ARM::AK_ARMV8R:
-  case ARM::AK_ARMV8MBaseline:
-  case ARM::AK_ARMV8MMainline:
+  case ARM::ArchKind::ARMV8A:
+  case ARM::ArchKind::ARMV8_1A:
+  case ARM::ArchKind::ARMV8_2A:
+  case ARM::ArchKind::ARMV8R:
+  case ARM::ArchKind::ARMV8MBaseline:
+  case ARM::ArchKind::ARMV8MMainline:
     return 8;
+  case ARM::ArchKind::INVALID:
+    return 0;
   }
-  return 0;
+  llvm_unreachable("Unhandled architecture");
 }
 
 StringRef llvm::ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
@@ -793,7 +798,7 @@ StringRef llvm::ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
   if (TT.isOSBinFormatMachO()) {
     if (TT.getEnvironment() == Triple::EABI ||
         TT.getOS() == Triple::UnknownOS ||
-        llvm::ARM::parseArchProfile(ArchName) == ARM::PK_M)
+        llvm::ARM::parseArchProfile(ArchName) == ARM::ProfileKind::M)
       return "aapcs";
     if (TT.isWatchABI())
       return "aapcs16";
@@ -831,17 +836,17 @@ unsigned llvm::AArch64::parseFPU(StringRef FPU) {
 }
 
 // Allows partial match, ex. "v8a" matches "armv8a".
-unsigned llvm::AArch64::parseArch(StringRef Arch) {
+AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
   Arch = getCanonicalArchName(Arch);
   if (checkArchVersion(Arch) < 8)
-    return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+    return ArchKind::INVALID;
 
   StringRef Syn = getArchSynonym(Arch);
   for (const auto A : AArch64ARCHNames) {
     if (A.getName().endswith(Syn))
-      return static_cast<unsigned>(A.ID);
+      return A.ID;
   }
-  return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+  return ArchKind::INVALID;
 }
 
 unsigned llvm::AArch64::parseArchExt(StringRef ArchExt) {
@@ -852,26 +857,26 @@ unsigned llvm::AArch64::parseArchExt(StringRef ArchExt) {
   return AArch64::AEK_INVALID;
 }
 
-unsigned llvm::AArch64::parseCPUArch(StringRef CPU) {
+AArch64::ArchKind llvm::AArch64::parseCPUArch(StringRef CPU) {
   for (const auto C : AArch64CPUNames) {
     if (CPU == C.getName())
-      return static_cast<unsigned>(C.ArchID);
+      return C.ArchID;
   }
-  return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+  return ArchKind::INVALID;
 }
 
 // ARM, Thumb, AArch64
-unsigned llvm::AArch64::parseArchISA(StringRef Arch) {
+ARM::ISAKind AArch64::parseArchISA(StringRef Arch) {
   return ARM::parseArchISA(Arch);
 }
 
 // Little/Big endian
-unsigned llvm::AArch64::parseArchEndian(StringRef Arch) {
+ARM::EndianKind AArch64::parseArchEndian(StringRef Arch) {
   return ARM::parseArchEndian(Arch);
 }
 
 // Profile A/R/M
-unsigned llvm::AArch64::parseArchProfile(StringRef Arch) {
+ARM::ProfileKind AArch64::parseArchProfile(StringRef Arch) {
   return ARM::parseArchProfile(Arch);
 }
 
diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp
index b5b7a955fdc..018f993c2dc 100644
--- a/llvm/lib/Support/Triple.cpp
+++ b/llvm/lib/Support/Triple.cpp
@@ -307,39 +307,46 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
 }
 
 static Triple::ArchType parseARMArch(StringRef ArchName) {
-  unsigned ISA = ARM::parseArchISA(ArchName);
-  unsigned ENDIAN = ARM::parseArchEndian(ArchName);
+  ARM::ISAKind ISA = ARM::parseArchISA(ArchName);
+  ARM::EndianKind ENDIAN = ARM::parseArchEndian(ArchName);
 
   Triple::ArchType arch = Triple::UnknownArch;
   switch (ENDIAN) {
-  case ARM::EK_LITTLE: {
+  case ARM::EndianKind::LITTLE: {
     switch (ISA) {
-    case ARM::IK_ARM:
+    case ARM::ISAKind::ARM:
       arch = Triple::arm;
       break;
-    case ARM::IK_THUMB:
+    case ARM::ISAKind::THUMB:
       arch = Triple::thumb;
       break;
-    case ARM::IK_AARCH64:
+    case ARM::ISAKind::AARCH64:
       arch = Triple::aarch64;
       break;
+    case ARM::ISAKind::INVALID:
+      break;
     }
     break;
   }
-  case ARM::EK_BIG: {
+  case ARM::EndianKind::BIG: {
     switch (ISA) {
-    case ARM::IK_ARM:
+    case ARM::ISAKind::ARM:
       arch = Triple::armeb;
       break;
-    case ARM::IK_THUMB:
+    case ARM::ISAKind::THUMB:
       arch = Triple::thumbeb;
       break;
-    case ARM::IK_AARCH64:
+    case ARM::ISAKind::AARCH64:
       arch = Triple::aarch64_be;
       break;
+    case ARM::ISAKind::INVALID:
+      break;
     }
     break;
   }
+  case ARM::EndianKind::INVALID: {
+    break;
+  }
   }
 
   ArchName = ARM::getCanonicalArchName(ArchName);
@@ -347,15 +354,15 @@ static Triple::ArchType parseARMArch(StringRef ArchName) {
     return Triple::UnknownArch;
 
   // Thumb only exists in v4+
-  if (ISA == ARM::IK_THUMB &&
+  if (ISA == ARM::ISAKind::THUMB &&
       (ArchName.startswith("v2") || ArchName.startswith("v3")))
     return Triple::UnknownArch;
 
   // Thumb only for v6m
-  unsigned Profile = ARM::parseArchProfile(ArchName);
+  ARM::ProfileKind Profile = ARM::parseArchProfile(ArchName);
   unsigned Version = ARM::parseArchVersion(ArchName);
-  if (Profile == ARM::PK_M && Version == 6) {
-    if (ENDIAN == ARM::EK_BIG)
+  if (Profile == ARM::ProfileKind::M && Version == 6) {
+    if (ENDIAN == ARM::EndianKind::BIG)
       return Triple::thumbeb;
     else
       return Triple::thumb;
@@ -534,51 +541,51 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
 
   // ARM sub arch.
   switch(ARM::parseArch(ARMSubArch)) {
-  case ARM::AK_ARMV4:
+  case ARM::ArchKind::ARMV4:
     return Triple::NoSubArch;
-  case ARM::AK_ARMV4T:
+  case ARM::ArchKind::ARMV4T:
     return Triple::ARMSubArch_v4t;
-  case ARM::AK_ARMV5T:
+  case ARM::ArchKind::ARMV5T:
     return Triple::ARMSubArch_v5;
-  case ARM::AK_ARMV5TE:
-  case ARM::AK_IWMMXT:
-  case ARM::AK_IWMMXT2:
-  case ARM::AK_XSCALE:
-  case ARM::AK_ARMV5TEJ:
+  case ARM::ArchKind::ARMV5TE:
+  case ARM::ArchKind::IWMMXT:
+  case ARM::ArchKind::IWMMXT2:
+  case ARM::ArchKind::XSCALE:
+  case ARM::ArchKind::ARMV5TEJ:
     return Triple::ARMSubArch_v5te;
-  case ARM::AK_ARMV6:
+  case ARM::ArchKind::ARMV6:
     return Triple::ARMSubArch_v6;
-  case ARM::AK_ARMV6K:
-  case ARM::AK_ARMV6KZ:
+  case ARM::ArchKind::ARMV6K:
+  case ARM::ArchKind::ARMV6KZ:
     return Triple::ARMSubArch_v6k;
-  case ARM::AK_ARMV6T2:
+  case ARM::ArchKind::ARMV6T2:
     return Triple::ARMSubArch_v6t2;
-  case ARM::AK_ARMV6M:
+  case ARM::ArchKind::ARMV6M:
     return Triple::ARMSubArch_v6m;
-  case ARM::AK_ARMV7A:
-  case ARM::AK_ARMV7R:
+  case ARM::ArchKind::ARMV7A:
+  case ARM::ArchKind::ARMV7R:
     return Triple::ARMSubArch_v7;
-  case ARM::AK_ARMV7VE:
+  case ARM::ArchKind::ARMV7VE:
     return Triple::ARMSubArch_v7ve;
-  case ARM::AK_ARMV7K:
+  case ARM::ArchKind::ARMV7K:
     return Triple::ARMSubArch_v7k;
-  case ARM::AK_ARMV7M:
+  case ARM::ArchKind::ARMV7M:
     return Triple::ARMSubArch_v7m;
-  case ARM::AK_ARMV7S:
+  case ARM::ArchKind::ARMV7S:
     return Triple::ARMSubArch_v7s;
-  case ARM::AK_ARMV7EM:
+  case ARM::ArchKind::ARMV7EM:
     return Triple::ARMSubArch_v7em;
-  case ARM::AK_ARMV8A:
+  case ARM::ArchKind::ARMV8A:
     return Triple::ARMSubArch_v8;
-  case ARM::AK_ARMV8_1A:
+  case ARM::ArchKind::ARMV8_1A:
     return Triple::ARMSubArch_v8_1a;
-  case ARM::AK_ARMV8_2A:
+  case ARM::ArchKind::ARMV8_2A:
     return Triple::ARMSubArch_v8_2a;
-  case ARM::AK_ARMV8R:
+  case ARM::ArchKind::ARMV8R:
     return Triple::ARMSubArch_v8r;
-  case ARM::AK_ARMV8MBaseline:
+  case ARM::ArchKind::ARMV8MBaseline:
     return Triple::ARMSubArch_v8m_baseline;
-  case ARM::AK_ARMV8MMainline:
+  case ARM::ArchKind::ARMV8MMainline:
     return Triple::ARMSubArch_v8m_mainline;
   default:
     return Triple::NoSubArch;
@@ -1550,7 +1557,7 @@ StringRef Triple::getARMCPUForArch(StringRef MArch) const {
     return StringRef();
 
   StringRef CPU = ARM::getDefaultCPU(MArch);
-  if (!CPU.empty())
+  if (!CPU.empty() && !CPU.equals("invalid"))
     return CPU;
 
   // If no specific architecture version is requested, return the minimum CPU
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index a79d5182054..4173765499f 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3862,8 +3862,8 @@ bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
   std::tie(Arch, ExtensionString) =
       getParser().parseStringToEndOfStatement().trim().split('+');
 
-  unsigned ID = AArch64::parseArch(Arch);
-  if (ID == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID))
+  AArch64::ArchKind ID = AArch64::parseArch(Arch);
+  if (ID == AArch64::ArchKind::INVALID)
     return Error(ArchLoc, "unknown arch name");
 
   if (parseToken(AsmToken::EndOfStatement))
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index c7ab87e5489..8063c1ee3c5 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -209,11 +209,11 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
 
     if (isTargetDarwin()) {
       StringRef ArchName = TargetTriple.getArchName();
-      unsigned ArchKind = ARM::parseArch(ArchName);
-      if (ArchKind == ARM::AK_ARMV7S)
+      ARM::ArchKind AK = ARM::parseArch(ArchName);
+      if (AK == ARM::ArchKind::ARMV7S)
         // Default to the Swift CPU when targeting armv7s/thumbv7s.
         CPUString = "swift";
-      else if (ArchKind == ARM::AK_ARMV7K)
+      else if (AK == ARM::ArchKind::ARMV7K)
         // Default to the Cortex-a7 CPU when targeting armv7k/thumbv7k.
         // ARMv7k does not use SjLj exception handling.
         CPUString = "cortex-a7";
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 80256bb8009..5335fa45a58 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9419,9 +9419,9 @@ void ARMAsmParser::FixModeAfterArchChange(bool WasThumb, SMLoc Loc) {
 ///  ::= .arch token
 bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
   StringRef Arch = getParser().parseStringToEndOfStatement().trim();
-  unsigned ID = ARM::parseArch(Arch);
+  ARM::ArchKind ID = ARM::parseArch(Arch);
 
-  if (ID == ARM::AK_INVALID)
+  if (ID == ARM::ArchKind::INVALID)
     return Error(L, "Unknown arch name");
 
   bool WasThumb = isThumb();
@@ -10069,9 +10069,9 @@ bool ARMAsmParser::parseDirectiveObjectArch(SMLoc L) {
   SMLoc ArchLoc = Parser.getTok().getLoc();
   Lex();
 
-  unsigned ID = ARM::parseArch(Arch);
+  ARM::ArchKind ID = ARM::parseArch(Arch);
 
-  if (ID == ARM::AK_INVALID)
+  if (ID == ARM::ArchKind::INVALID)
     return Error(ArchLoc, "unknown architecture '" + Arch + "'");
   if (parseToken(AsmToken::EndOfStatement))
     return true;
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index a77df7a2598..97a27ece0d4 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -1127,30 +1127,30 @@ uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
 }
 
 static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
-  unsigned AK = ARM::parseArch(Arch);
+  ARM::ArchKind AK = ARM::parseArch(Arch);
   switch (AK) {
   default:
     return MachO::CPU_SUBTYPE_ARM_V7;
-  case ARM::AK_ARMV4T:
+  case ARM::ArchKind::ARMV4T:
     return MachO::CPU_SUBTYPE_ARM_V4T;
-  case ARM::AK_ARMV5T:
-  case ARM::AK_ARMV5TE:
-  case ARM::AK_ARMV5TEJ:
+  case ARM::ArchKind::ARMV5T:
+  case ARM::ArchKind::ARMV5TE:
+  case ARM::ArchKind::ARMV5TEJ:
     return MachO::CPU_SUBTYPE_ARM_V5;
-  case ARM::AK_ARMV6:
-  case ARM::AK_ARMV6K:
+  case ARM::ArchKind::ARMV6:
+  case ARM::ArchKind::ARMV6K:
     return MachO::CPU_SUBTYPE_ARM_V6;
-  case ARM::AK_ARMV7A:
+  case ARM::ArchKind::ARMV7A:
     return MachO::CPU_SUBTYPE_ARM_V7;
-  case ARM::AK_ARMV7S:
+  case ARM::ArchKind::ARMV7S:
     return MachO::CPU_SUBTYPE_ARM_V7S;
-  case ARM::AK_ARMV7K:
+  case ARM::ArchKind::ARMV7K:
     return MachO::CPU_SUBTYPE_ARM_V7K;
-  case ARM::AK_ARMV6M:
+  case ARM::ArchKind::ARMV6M:
     return MachO::CPU_SUBTYPE_ARM_V6M;
-  case ARM::AK_ARMV7M:
+  case ARM::ArchKind::ARMV7M:
     return MachO::CPU_SUBTYPE_ARM_V7M;
-  case ARM::AK_ARMV7EM:
+  case ARM::ArchKind::ARMV7EM:
     return MachO::CPU_SUBTYPE_ARM_V7EM;
   }
 }
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 93f4006cee8..af11fa74bba 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -92,9 +92,9 @@ class ARMTargetAsmStreamer : public ARMTargetStreamer {
   void emitTextAttribute(unsigned Attribute, StringRef String) override;
   void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
                             StringRef StringValue) override;
-  void emitArch(unsigned Arch) override;
+  void emitArch(ARM::ArchKind Arch) override;
   void emitArchExtension(unsigned ArchExt) override;
-  void emitObjectArch(unsigned Arch) override;
+  void emitObjectArch(ARM::ArchKind Arch) override;
   void emitFPU(unsigned FPU) override;
   void emitInst(uint32_t Inst, char Suffix = '\0') override;
   void finishAttributeSection() override;
@@ -218,7 +218,7 @@ void ARMTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
   OS << "\n";
 }
 
-void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitArch(ARM::ArchKind Arch) {
   OS << "\t.arch\t" << ARM::getArchName(Arch) << "\n";
 }
 
@@ -226,7 +226,7 @@ void ARMTargetAsmStreamer::emitArchExtension(unsigned ArchExt) {
   OS << "\t.arch_extension\t" << ARM::getArchExtName(ArchExt) << "\n";
 }
 
-void ARMTargetAsmStreamer::emitObjectArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitObjectArch(ARM::ArchKind Arch) {
   OS << "\t.object_arch\t" << ARM::getArchName(Arch) << '\n';
 }
 
@@ -303,8 +303,8 @@ private:
 
   StringRef CurrentVendor;
   unsigned FPU = ARM::FK_INVALID;
-  unsigned Arch = ARM::AK_INVALID;
-  unsigned EmittedArch = ARM::AK_INVALID;
+  ARM::ArchKind Arch = ARM::ArchKind::INVALID;
+  ARM::ArchKind EmittedArch = ARM::ArchKind::INVALID;
   SmallVector<AttributeItem, 64> Contents;
 
   MCSection *AttributeSection = nullptr;
@@ -404,8 +404,8 @@ private:
   void emitTextAttribute(unsigned Attribute, StringRef String) override;
   void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
                             StringRef StringValue) override;
-  void emitArch(unsigned Arch) override;
-  void emitObjectArch(unsigned Arch) override;
+  void emitArch(ARM::ArchKind Arch) override;
+  void emitObjectArch(ARM::ArchKind Arch) override;
   void emitFPU(unsigned FPU) override;
   void emitInst(uint32_t Inst, char Suffix = '\0') override;
   void finishAttributeSection() override;
@@ -776,11 +776,11 @@ void ARMTargetELFStreamer::emitIntTextAttribute(unsigned Attribute,
                     /* OverwriteExisting= */ true);
 }
 
-void ARMTargetELFStreamer::emitArch(unsigned Value) {
+void ARMTargetELFStreamer::emitArch(ARM::ArchKind Value) {
   Arch = Value;
 }
 
-void ARMTargetELFStreamer::emitObjectArch(unsigned Value) {
+void ARMTargetELFStreamer::emitObjectArch(ARM::ArchKind Value) {
   EmittedArch = Value;
 }
 
@@ -791,7 +791,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
                    ARM::getCPUAttr(Arch),
                    false);
 
-  if (EmittedArch == ARM::AK_INVALID)
+  if (EmittedArch == ARM::ArchKind::INVALID)
     setAttributeItem(CPU_arch,
                      ARM::getArchAttr(Arch),
                      false);
@@ -801,58 +801,58 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
                      false);
 
   switch (Arch) {
-  case ARM::AK_ARMV2:
-  case ARM::AK_ARMV2A:
-  case ARM::AK_ARMV3:
-  case ARM::AK_ARMV3M:
-  case ARM::AK_ARMV4:
+  case ARM::ArchKind::ARMV2:
+  case ARM::ArchKind::ARMV2A:
+  case ARM::ArchKind::ARMV3:
+  case ARM::ArchKind::ARMV3M:
+  case ARM::ArchKind::ARMV4:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     break;
 
-  case ARM::AK_ARMV4T:
-  case ARM::AK_ARMV5T:
-  case ARM::AK_ARMV5TE:
-  case ARM::AK_ARMV6:
+  case ARM::ArchKind::ARMV4T:
+  case ARM::ArchKind::ARMV5T:
+  case ARM::ArchKind::ARMV5TE:
+  case ARM::ArchKind::ARMV6:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, Allowed, false);
     break;
 
-  case ARM::AK_ARMV6T2:
+  case ARM::ArchKind::ARMV6T2:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
     break;
 
-  case ARM::AK_ARMV6K:
-  case ARM::AK_ARMV6KZ:
+  case ARM::ArchKind::ARMV6K:
+  case ARM::ArchKind::ARMV6KZ:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, Allowed, false);
     setAttributeItem(Virtualization_use, AllowTZ, false);
     break;
 
-  case ARM::AK_ARMV6M:
+  case ARM::ArchKind::ARMV6M:
     setAttributeItem(THUMB_ISA_use, Allowed, false);
     break;
 
-  case ARM::AK_ARMV7A:
+  case ARM::ArchKind::ARMV7A:
     setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
     break;
 
-  case ARM::AK_ARMV7R:
+  case ARM::ArchKind::ARMV7R:
     setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
     break;
 
-  case ARM::AK_ARMV7M:
+  case ARM::ArchKind::ARMV7M:
     setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
     setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
     break;
 
-  case ARM::AK_ARMV8A:
-  case ARM::AK_ARMV8_1A:
-  case ARM::AK_ARMV8_2A:
+  case ARM::ArchKind::ARMV8A:
+  case ARM::ArchKind::ARMV8_1A:
+  case ARM::ArchKind::ARMV8_2A:
     setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
@@ -860,26 +860,26 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
     setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
     break;
 
-  case ARM::AK_ARMV8MBaseline:
-  case ARM::AK_ARMV8MMainline:
+  case ARM::ArchKind::ARMV8MBaseline:
+  case ARM::ArchKind::ARMV8MMainline:
     setAttributeItem(THUMB_ISA_use, AllowThumbDerived, false);
     setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
     break;
 
-  case ARM::AK_IWMMXT:
+  case ARM::ArchKind::IWMMXT:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, Allowed, false);
     setAttributeItem(WMMX_arch, AllowWMMXv1, false);
     break;
 
-  case ARM::AK_IWMMXT2:
+  case ARM::ArchKind::IWMMXT2:
     setAttributeItem(ARM_ISA_use, Allowed, false);
     setAttributeItem(THUMB_ISA_use, Allowed, false);
     setAttributeItem(WMMX_arch, AllowWMMXv2, false);
     break;
 
   default:
-    report_fatal_error("Unknown Arch: " + Twine(Arch));
+    report_fatal_error("Unknown Arch: " + Twine(ARM::getArchName(Arch)));
     break;
   }
 }
@@ -1057,7 +1057,7 @@ void ARMTargetELFStreamer::finishAttributeSection() {
   if (FPU != ARM::FK_INVALID)
     emitFPUDefaultAttributes();
 
-  if (Arch != ARM::AK_INVALID)
+  if (Arch != ARM::ArchKind::INVALID)
     emitArchDefaultAttributes();
 
   if (Contents.empty())
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index b8a8b1f7619..9fb6ffcd6d2 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -136,8 +136,8 @@ std::string ARM_MC::ParseARMTriple(const Triple &TT, StringRef CPU) {
 
   std::string ARMArchFeature;
 
-  unsigned ArchID = ARM::parseArch(TT.getArchName());
-  if (ArchID != ARM::AK_INVALID &&  (CPU.empty() || CPU == "generic"))
+  ARM::ArchKind ArchID = ARM::parseArch(TT.getArchName());
+  if (ArchID != ARM::ArchKind::INVALID &&  (CPU.empty() || CPU == "generic"))
     ARMArchFeature = (ARMArchFeature + "+" + ARM::getArchName(ArchID)).str();
 
   if (isThumb) {
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
index 4a943187ab6..42371736fef 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
@@ -71,9 +71,9 @@ void ARMTargetStreamer::emitTextAttribute(unsigned Attribute,
 void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
                                              unsigned IntValue,
                                              StringRef StringValue) {}
-void ARMTargetStreamer::emitArch(unsigned Arch) {}
+void ARMTargetStreamer::emitArch(ARM::ArchKind Arch) {}
 void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
-void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
+void ARMTargetStreamer::emitObjectArch(ARM::ArchKind Arch) {}
 void ARMTargetStreamer::emitFPU(unsigned FPU) {}
 void ARMTargetStreamer::finishAttributeSection() {}
 void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}