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| author | Chris Lattner <sabre@nondot.org> | 2005-05-13 16:20:22 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-05-13 16:20:22 +0000 |
| commit | 6756f2f79502deb22e98c0d6a7c9e1ff5e60905d (patch) | |
| tree | b62a16f141b12e4022fca6c10827bb519230530a /llvm/lib | |
| parent | 74905e0fb51f554d42887d0c61950db065caaa91 (diff) | |
| download | bcm5719-llvm-6756f2f79502deb22e98c0d6a7c9e1ff5e60905d.tar.gz bcm5719-llvm-6756f2f79502deb22e98c0d6a7c9e1ff5e60905d.zip | |
Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll
llvm-svn: 21939
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp index 2551771999c..8a0f27b108c 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -64,13 +64,15 @@ namespace { setOperationAction(ISD::SREM, MVT::i32, Expand); setOperationAction(ISD::UREM, MVT::i32, Expand); - // We don't support sin/cos/sqrt + // We don't support sin/cos/sqrt/fmod setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); setOperationAction(ISD::FSQRT, MVT::f64, Expand); + setOperationAction(ISD::SREM , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); setOperationAction(ISD::FSQRT, MVT::f32, Expand); + setOperationAction(ISD::SREM , MVT::f32, Expand); //PowerPC does not have CTPOP or CTTZ setOperationAction(ISD::CTPOP, MVT::i32 , Expand); diff --git a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp index a91223d4694..cfc8a5496d3 100644 --- a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp @@ -55,13 +55,15 @@ namespace { setOperationAction(ISD::MEMSET, MVT::Other, Expand); setOperationAction(ISD::MEMCPY, MVT::Other, Expand); - // We don't support sin/cos/sqrt + // We don't support sin/cos/sqrt/fmod setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); setOperationAction(ISD::FSQRT, MVT::f64, Expand); + setOperationAction(ISD::SREM , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); setOperationAction(ISD::FSQRT, MVT::f32, Expand); + setOperationAction(ISD::SREM , MVT::f32, Expand); // PPC 64 has i16 and i32 but no i8 (or i1) SEXTLOAD setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand); |
