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authorJatin Bhateja <jatin.bhateja@gmail.com>2017-08-19 17:59:58 +0000
committerJatin Bhateja <jatin.bhateja@gmail.com>2017-08-19 17:59:58 +0000
commit66f7958e91e52c10e010e7e56f6ce9610a09cffa (patch)
treee6089face6ebee281cd6464e9b6ec57e4c7e72bd /llvm/lib
parent51321aef8e84d973822766de4d075c4d5cffca13 (diff)
downloadbcm5719-llvm-66f7958e91e52c10e010e7e56f6ce9610a09cffa.tar.gz
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Revert rL311247 : To rectify commit message.
Summary: This reverts commit rL311247. Differential Revision: https://reviews.llvm.org/D36927 llvm-svn: 311252
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp56
1 files changed, 3 insertions, 53 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index b8f83085299..6a5e85f3d7f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14190,18 +14190,10 @@ SDValue DAGCombiner::createBuildVecShuffle(const SDLoc &DL, SDNode *N,
EVT InVT1 = VecIn1.getValueType();
EVT InVT2 = VecIn2.getNode() ? VecIn2.getValueType() : InVT1;
- unsigned Vec2Offset = 0;
+ unsigned Vec2Offset = InVT1.getVectorNumElements();
unsigned NumElems = VT.getVectorNumElements();
unsigned ShuffleNumElems = NumElems;
- // In case both the input vectors are extracted from same base
- // vector we do not need extra addend (Vec2Offset) while
- // computing shuffle mask.
- if (!VecIn2 || !(VecIn1.getOpcode() == ISD::EXTRACT_SUBVECTOR) ||
- !(VecIn2.getOpcode() == ISD::EXTRACT_SUBVECTOR) ||
- !(VecIn1.getOperand(0) == VecIn2.getOperand(0)))
- Vec2Offset = InVT1.getVectorNumElements();
-
// We can't generate a shuffle node with mismatched input and output types.
// Try to make the types match the type of the output.
if (InVT1 != VT || InVT2 != VT) {
@@ -14348,6 +14340,7 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
if (Op.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
!isa<ConstantSDNode>(Op.getOperand(1)))
return SDValue();
+
SDValue ExtractedFromVec = Op.getOperand(0);
// All inputs must have the same element type as the output.
@@ -14370,50 +14363,6 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
if (VecIn.size() < 2)
return SDValue();
- // If all the Operands of BUILD_VECTOR extract from same
- // vector, then split the vector efficiently based on the maximum
- // vector access index and adjust the VectorMask and
- // VecIn accordingly.
- if (VecIn.size() == 2) {
- unsigned MaxIndex = 0;
- unsigned NearestPow2 = 0;
- SDValue Vec = VecIn.back();
- EVT InVT = Vec.getValueType();
- MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
- SmallVector<unsigned, 8> IndexVec(NumElems, 0);
-
- for (unsigned i = 0; i < NumElems; i++) {
- if (VectorMask[i] <= 0)
- continue;
- unsigned Index = N->getOperand(i).getConstantOperandVal(1);
- IndexVec[i] = Index;
- MaxIndex = std::max(MaxIndex, Index);
- }
-
- NearestPow2 = PowerOf2Ceil(MaxIndex);
- if (InVT.isSimple() && (NearestPow2 > 2) &&
- ((NumElems * 2) < NearestPow2)) {
- unsigned SplitSize = NearestPow2 / 2;
- EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
- InVT.getVectorElementType(), SplitSize);
- if (TLI.isTypeLegal(SplitVT)) {
- SDValue VecIn2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, Vec,
- DAG.getConstant(SplitSize, DL, IdxTy));
- SDValue VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, Vec,
- DAG.getConstant(0, DL, IdxTy));
- VecIn.pop_back();
- VecIn.push_back(VecIn1);
- VecIn.push_back(VecIn2);
-
- for (unsigned i = 0; i < NumElems; i++) {
- if (VectorMask[i] <= 0)
- continue;
- VectorMask[i] = (IndexVec[i] < SplitSize) ? 1 : 2;
- }
- }
- }
- }
-
// TODO: We want to sort the vectors by descending length, so that adjacent
// pairs have similar length, and the longer vector is always first in the
// pair.
@@ -14502,6 +14451,7 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
DAG.getVectorShuffle(VT, DL, Shuffles[Left], Shuffles[Right], Mask);
}
}
+
return Shuffles[0];
}
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