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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-11 17:38:36 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-11 17:38:36 +0000 |
| commit | 661ae7778d085ad12a9577f5d1279f7a1df2037c (patch) | |
| tree | bbe340bf1a79870e4f500d8971752946b8834fad /llvm/lib | |
| parent | 65ef3280b83cf13c7840d30de8f73fab58a2b025 (diff) | |
| download | bcm5719-llvm-661ae7778d085ad12a9577f5d1279f7a1df2037c.tar.gz bcm5719-llvm-661ae7778d085ad12a9577f5d1279f7a1df2037c.zip | |
[X86][BtVer2] Model ymm move as double pumped instructions
We still need to handle mmx/xmm moves as 'decode-only' no-pipe instructions
llvm-svn: 332109
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 6ae735fb913..01e41b9621f 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -279,11 +279,11 @@ defm : X86WriteRes<WriteFStoreY, [JSAGU, JFPU1, JSTC], 1, [1, 1, 1], 1>; defm : X86WriteRes<WriteFMaskedStore, [JSAGU, JFPU01, JFPX], 6, [1, 1, 4], 1>; defm : X86WriteRes<WriteFMaskedStoreY, [JSAGU, JFPU01, JFPX], 6, [2, 2, 4], 2>; -def : WriteRes<WriteFMove, [JFPU01, JFPX]>; -def : WriteRes<WriteFMoveX, [JFPU01, JFPX]>; -def : WriteRes<WriteFMoveY, [JFPU01, JFPX]>; +defm : X86WriteRes<WriteFMove, [JFPU01, JFPX], 1, [1, 1], 1>; +defm : X86WriteRes<WriteFMoveX, [JFPU01, JFPX], 1, [1, 1], 1>; +defm : X86WriteRes<WriteFMoveY, [JFPU01, JFPX], 1, [2, 2], 2>; -def : WriteRes<WriteEMMS, [JFPU01, JFPX]> { let Latency = 2; } +defm : X86WriteRes<WriteEMMS, [JFPU01, JFPX], 2, [1, 1], 1>; defm : JWriteResFpuPair<WriteFAdd, [JFPU0, JFPA], 3>; defm : JWriteResFpuPair<WriteFAddX, [JFPU0, JFPA], 3>; @@ -415,9 +415,9 @@ defm : X86WriteRes<WriteVecStoreY, [JSAGU, JFPU1, JSTC], 1, [1, 1, 1], defm : X86WriteRes<WriteVecMaskedStore, [JSAGU, JFPU01, JVALU], 6, [1, 1, 4], 1>; defm : X86WriteRes<WriteVecMaskedStoreY, [JSAGU, JFPU01, JVALU], 6, [2, 2, 4], 2>; -def : WriteRes<WriteVecMove, [JFPU01, JVALU]>; -def : WriteRes<WriteVecMoveX, [JFPU01, JVALU]>; -def : WriteRes<WriteVecMoveY, [JFPU01, JVALU]>; +defm : X86WriteRes<WriteVecMove, [JFPU01, JVALU], 1, [1, 1], 1>; +defm : X86WriteRes<WriteVecMoveX, [JFPU01, JVALU], 1, [1, 1], 1>; +defm : X86WriteRes<WriteVecMoveY, [JFPU01, JVALU], 1, [2, 2], 2>; defm : JWriteResFpuPair<WriteVecALU, [JFPU01, JVALU], 1>; defm : JWriteResFpuPair<WriteVecALUX, [JFPU01, JVALU], 1>; |
