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authorTim Renouf <tim.renouf@amd.com>2017-09-11 13:55:39 +0000
committerTim Renouf <tim.renouf@amd.com>2017-09-11 13:55:39 +0000
commit660ba2b8afb797fd9dfb0efa3c9135dec12a5424 (patch)
treec4346f6b628951ea76ce1d94c6713e7c43b1b442 /llvm/lib
parent8a1c2b41e9e1cae05ea84c442708fe5695e6a5de (diff)
downloadbcm5719-llvm-660ba2b8afb797fd9dfb0efa3c9135dec12a5424.tar.gz
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[AMDGPU] exp should not be in WQM mode
A mrt exp with vm=1 must be in exact (non-WQM) mode, as it also exports the exec mask as the valid mask to determine which pixels to render. This commit marks any exp as needing to be in exact mode. Actually, if there are multiple mrt exps, only one needs to have vm=1, and only that one needs to be in exact mode. But that is an optimization for another day. Differential Revision: https://reviews.llvm.org/D36305 llvm-svn: 312915
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index eb94c00e1ca..f908abb3ed8 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -849,7 +849,7 @@ class EXP_Helper<bit done, SDPatternOperator node = null_frag> : EXPCommon<
// Split EXP instruction into EXP and EXP_DONE so we can set
// mayLoad for done=1.
multiclass EXP_m<bit done, SDPatternOperator node> {
- let mayLoad = done in {
+ let mayLoad = done, DisableWQM = 1 in {
let isPseudo = 1, isCodeGenOnly = 1 in {
def "" : EXP_Helper<done, node>,
SIMCInstr <"exp"#!if(done, "_done", ""), SIEncodingFamily.NONE>;
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