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| author | Hal Finkel <hfinkel@anl.gov> | 2015-02-05 18:42:53 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2015-02-05 18:42:53 +0000 |
| commit | 65d1cbf9df60f8ee44ceb242c03dc59377910425 (patch) | |
| tree | 0cd55fc4661fc6235af56e8ef2bcccf32e02da14 /llvm/lib | |
| parent | 27d50073b31a561d63cda0d267434231c8abc86b (diff) | |
| download | bcm5719-llvm-65d1cbf9df60f8ee44ceb242c03dc59377910425.tar.gz bcm5719-llvm-65d1cbf9df60f8ee44ceb242c03dc59377910425.zip | |
[PowerPC] Generate pre-increment floating-point ld/st instructions
PowerPC supports pre-increment floating-point load/store instructions, both r+r
and r+i, and we had patterns for them, but they were not marked as legal. Mark
them as legal (and add a test case).
llvm-svn: 228327
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index b98c9e1b067..9f91fcb5aa3 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -88,11 +88,15 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); + setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); + setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); + setIndexedStoreAction(ISD::PRE_INC, MVT::f32, Legal); + setIndexedStoreAction(ISD::PRE_INC, MVT::f64, Legal); if (Subtarget.useCRBits()) { setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); |
