diff options
| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-05-27 17:58:03 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-05-27 17:58:03 +0000 |
| commit | 655c2deaf6791d5692dcb5fbe266bdccddb5d4c7 (patch) | |
| tree | f6422b02326e54ff0e3b64efe6a686c2a56da589 /llvm/lib | |
| parent | 5aa0ab3869f76beed93123b3fe3862a1c5697068 (diff) | |
| download | bcm5719-llvm-655c2deaf6791d5692dcb5fbe266bdccddb5d4c7.tar.gz bcm5719-llvm-655c2deaf6791d5692dcb5fbe266bdccddb5d4c7.zip | |
[ARM] Remove tBLXr Pat made redundant by r269101. NFCI.
llvm-svn: 271023
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb.td | 5 |
2 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 0ef5e9f0ebd..fe9959adddb 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -1388,11 +1388,6 @@ class T2Ipostldst<bit signed, bits<2> opcod, bit load, bit pre, let DecoderMethod = "DecodeT2LdStPre"; } -// Tv5Pat - Same as Pat<>, but requires V5T Thumb mode. -class Tv5Pat<dag pattern, dag result> : Pat<pattern, result> { - list<Predicate> Predicates = [IsThumb, IsThumb1Only, HasV5T]; -} - // T1Pat - Same as Pat<>, but requires that the compiler be in Thumb1 mode. class T1Pat<dag pattern, dag result> : Pat<pattern, result> { list<Predicate> Predicates = [IsThumb, IsThumb1Only]; diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 8903d99128c..9aceefdc4aa 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -1404,11 +1404,6 @@ def : T1Pat<(ARMWrapperJT tjumptable:$dst), def : T1Pat<(ARMcall texternalsym:$func), (tBL texternalsym:$func)>, Requires<[IsThumb]>; - -// Indirect calls to ARM routines -def : Tv5Pat<(ARMcall GPR:$dst), (tBLXr GPR:$dst)>, - Requires<[IsThumb, HasV5T]>; - // zextload i1 -> zextload i8 def : T1Pat<(zextloadi1 t_addrmode_is1:$addr), (tLDRBi t_addrmode_is1:$addr)>; |

