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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-13 03:55:43 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-13 03:55:43 +0000 |
| commit | 638f802381178350c0897659515607b92bd20dcb (patch) | |
| tree | a3b6312afec07befdc65b5635311889b8712c44b /llvm/lib | |
| parent | eaa230fe3c868beeaea70b7621acc9bfaf126d04 (diff) | |
| download | bcm5719-llvm-638f802381178350c0897659515607b92bd20dcb.tar.gz bcm5719-llvm-638f802381178350c0897659515607b92bd20dcb.zip | |
AMDGPU/GlobalISel: Select 16-bit VALU bit ops
llvm-svn: 371807
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index df45771e264..e5ca22c87f9 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -798,17 +798,17 @@ defm : Arithmetic_i16_Pats<umax, V_MAX_U16_e64, 1>; def : GCNPat < (and i16:$src0, i16:$src1), - (V_AND_B32_e64 $src0, $src1) + (V_AND_B32_e64 VSrc_b32:$src0, VSrc_b32:$src1) >; def : GCNPat < (or i16:$src0, i16:$src1), - (V_OR_B32_e64 $src0, $src1) + (V_OR_B32_e64 VSrc_b32:$src0, VSrc_b32:$src1) >; def : GCNPat < (xor i16:$src0, i16:$src1), - (V_XOR_B32_e64 $src0, $src1) + (V_XOR_B32_e64 VSrc_b32:$src0, VSrc_b32:$src1) >; let Predicates = [Has16BitInsts, isGFX7GFX8GFX9] in { |
