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| author | Sam Parker <sam.parker@arm.com> | 2016-08-10 09:34:34 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2016-08-10 09:34:34 +0000 |
| commit | 62965c96dfe426ac10524c3f148d2fa008d111be (patch) | |
| tree | f9adf44dbf8c28ec4521d1f048ff29fc71f75219 /llvm/lib | |
| parent | a992afe80977bedcbe85a1140efcc8fd28878df1 (diff) | |
| download | bcm5719-llvm-62965c96dfe426ac10524c3f148d2fa008d111be.tar.gz bcm5719-llvm-62965c96dfe426ac10524c3f148d2fa008d111be.zip | |
[ARM] Improve sxta{b|h} and uxta{b|h} tests
Created a Thumb2 predicated pattern matcher that uses Thumb2 and
HasT2ExtractPack and used it to redefine the patterns for sxta{b|h}
and uxta{b|h}. Also used the similar patterns to fill in isel pattern
gaps for the corresponding instructions in the ARM backend.
The patch is mainly changes to tests since most of this functionality
appears not to have been tested.
Differential Revision: https://reviews.llvm.org/D23273
llvm-svn: 278207
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 31 |
3 files changed, 33 insertions, 12 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 25f92df7e11..9427396c58d 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -1005,6 +1005,9 @@ class Thumb2DSPPat<dag pattern, dag result> : Pat<pattern, result> { class Thumb2DSPMulPat<dag pattern, dag result> : Pat<pattern, result> { list<Predicate> Predicates = [IsThumb2, UseMulOps, HasDSP]; } +class Thumb2ExtractPat<dag pattern, dag result> : Pat<pattern, result> { + list<Predicate> Predicates = [IsThumb2, HasT2ExtractPack]; +} //===----------------------------------------------------------------------===// // Thumb Instruction Format Definitions. // diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index b7abc48fe08..cda8bb70f1c 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -3416,6 +3416,12 @@ def SXTAB : AI_exta_rrot<0b01101010, def SXTAH : AI_exta_rrot<0b01101011, "sxtah", BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS,i16))>>; +def : ARMV6Pat<(add rGPR:$Rn, (sext_inreg (srl rGPR:$Rm, rot_imm:$rot), i8)), + (SXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; +def : ARMV6Pat<(add rGPR:$Rn, (sext_inreg (srl rGPR:$Rm, imm8_or_16:$rot), + i16)), + (SXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; + def SXTB16 : AI_ext_rrot_np<0b01101000, "sxtb16">; def SXTAB16 : AI_exta_rrot_np<0b01101000, "sxtab16">; @@ -3443,6 +3449,11 @@ def UXTAB : AI_exta_rrot<0b01101110, "uxtab", BinOpFrag<(add node:$LHS, (and node:$RHS, 0x00FF))>>; def UXTAH : AI_exta_rrot<0b01101111, "uxtah", BinOpFrag<(add node:$LHS, (and node:$RHS, 0xFFFF))>>; + +def : ARMV6Pat<(add rGPR:$Rn, (and (srl rGPR:$Rm, rot_imm:$rot), 0xFF)), + (UXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; +def : ARMV6Pat<(add rGPR:$Rn, (and (srl rGPR:$Rm, imm8_or_16:$rot), 0xFFFF)), + (UXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; } // This isn't safe in general, the add is two 16-bit units, not a 32-bit add. diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index d908b8a906b..7d4f27d38aa 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -1984,12 +1984,19 @@ def t2SXTAB16 : T2I_exta_rrot_np<0b010, "sxtab16">; // A simple right-shift can also be used in most cases (the exception is the // SXTH operations with a rotate of 24: there the non-contiguous bits are // relevant). -def : Pat<(add rGPR:$Rn, (sext_inreg (srl rGPR:$Rm, rot_imm:$rot), i8)), - (t2SXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>, - Requires<[HasT2ExtractPack, IsThumb2]>; -def : Pat<(add rGPR:$Rn, (sext_inreg (srl rGPR:$Rm, imm8_or_16:$rot), i16)), - (t2SXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>, - Requires<[HasT2ExtractPack, IsThumb2]>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (sext_inreg + (srl rGPR:$Rm, rot_imm:$rot), i8)), + (t2SXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (sext_inreg + (srl rGPR:$Rm, imm8_or_16:$rot), i16)), + (t2SXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (sext_inreg + (rotr rGPR:$Rm, (i32 24)), i16)), + (t2SXTAH rGPR:$Rn, rGPR:$Rm, (i32 3))>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (sext_inreg + (or (srl rGPR:$Rm, (i32 24)), + (shl rGPR:$Rm, (i32 8))), i16)), + (t2SXTAH rGPR:$Rn, rGPR:$Rm, (i32 3))>; // Zero extenders @@ -2018,12 +2025,12 @@ def t2UXTAH : T2I_exta_rrot<0b001, "uxtah", BinOpFrag<(add node:$LHS, (and node:$RHS, 0xFFFF))>>; def t2UXTAB16 : T2I_exta_rrot_np<0b011, "uxtab16">; -def : Pat<(add rGPR:$Rn, (and (srl rGPR:$Rm, rot_imm:$rot), 0xFF)), - (t2UXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>, - Requires<[HasT2ExtractPack, IsThumb2]>; -def : Pat<(add rGPR:$Rn, (and (srl rGPR:$Rm, imm8_or_16:$rot), 0xFFFF)), - (t2UXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>, - Requires<[HasT2ExtractPack, IsThumb2]>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (and (srl rGPR:$Rm, rot_imm:$rot), + 0xFF)), + (t2UXTAB rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; +def : Thumb2ExtractPat<(add rGPR:$Rn, (and (srl rGPR:$Rm, imm8_or_16:$rot), + 0xFFFF)), + (t2UXTAH rGPR:$Rn, rGPR:$Rm, rot_imm:$rot)>; } |

