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| author | Zinovy Nis <zinovy.nis@gmail.com> | 2019-10-20 20:01:16 +0000 |
|---|---|---|
| committer | Zinovy Nis <zinovy.nis@gmail.com> | 2019-10-20 20:01:16 +0000 |
| commit | 5fa36e42c43bc0816ad96597e20416a3cb8cd4dd (patch) | |
| tree | 62b77f9ff8032e2bbf0ff123165a12e5ec1bc0a1 /llvm/lib | |
| parent | c08666abafb449f97c58eb8a730e56a085b0812f (diff) | |
| download | bcm5719-llvm-5fa36e42c43bc0816ad96597e20416a3cb8cd4dd.tar.gz bcm5719-llvm-5fa36e42c43bc0816ad96597e20416a3cb8cd4dd.zip | |
Fix buildbot error in SIRegisterInfo.cpp.
llvm-svn: 375373
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 7ff5b68bde5..f58bc3060c4 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -376,9 +376,6 @@ void SIRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB, void SIRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, int64_t Offset) const { - - MachineBasicBlock *MBB = MI.getParent(); - MachineFunction *MF = MBB->getParent(); const SIInstrInfo *TII = ST.getInstrInfo(); #ifndef NDEBUG @@ -395,6 +392,10 @@ void SIRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, #endif MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); +#ifndef NDEBUG + MachineBasicBlock *MBB = MI.getParent(); + MachineFunction *MF = MBB->getParent(); +#endif assert(FIOp && FIOp->isFI() && "frame index must be address operand"); assert(TII->isMUBUF(MI)); assert(TII->getNamedOperand(MI, AMDGPU::OpName::soffset)->getReg() == |
