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authorJim Grosbach <grosbach@apple.com>2011-08-09 21:22:41 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-09 21:22:41 +0000
commit5e80abbb5dacf6ff6036dc940b294e6c65527cd3 (patch)
tree3e603d50a0c48012db6e7da51bf5bb78f6c169ea /llvm/lib
parentc7afd843222f421520409887d4489e61e2807d73 (diff)
downloadbcm5719-llvm-5e80abbb5dacf6ff6036dc940b294e6c65527cd3.tar.gz
bcm5719-llvm-5e80abbb5dacf6ff6036dc940b294e6c65527cd3.zip
ARM fix typo in pre-indexed store lowering.
rdar://9915869 llvm-svn: 137148
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b72467f16ac..8e326cfa7c5 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -5291,7 +5291,7 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
}
case ARM::STRi_preidx:
case ARM::STRBi_preidx: {
- unsigned NewOpc = MI->getOpcode() == ARM::STRr_preidx ?
+ unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ?
ARM::STR_PRE_IMM : ARM::STRB_PRE_IMM;
// Decode the offset.
unsigned Offset = MI->getOperand(4).getImm();
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