fix the int<->fp instructions, which apparently take a single float register

to represent the int part (because it's always 32-bits)

llvm-svn: 24976

2 files changed, 16 insertions, 26 deletions

diff --git a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index 775093d0a62..3c307d34c32 100644
--- a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -601,28 +601,14 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     SDOperand Lo = DAG.getNode(V8ISD::Lo, MVT::i32, CP);
     return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
   }
-  case ISD::FP_TO_SINT: {
+  case ISD::FP_TO_SINT:
     // Convert the fp value to integer in an FP register.
-    Op = DAG.getNode(V8ISD::FTOI, Op.getOperand(0).getValueType(),
-                     Op.getOperand(0));
-    int Size = Op.getOperand(0).getValueType() == MVT::f32 ? 4 : 8;
-    int FrameIdx =
-      DAG.getMachineFunction().getFrameInfo()->CreateStackObject(Size, Size);
-    SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i32);
-    SDOperand ST = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
-                               Op, FI, DAG.getSrcValue(0));
-    return DAG.getLoad(MVT::i32, ST, FI, DAG.getSrcValue(0));
-  }
+    assert(Op.getValueType() == MVT::i32);
+    Op = DAG.getNode(V8ISD::FTOI, MVT::f32, Op.getOperand(0));
+    return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
   case ISD::SINT_TO_FP: {
-    int Size = Op.getOperand(0).getValueType() == MVT::f32 ? 4 : 8;
-    int FrameIdx =
-      DAG.getMachineFunction().getFrameInfo()->CreateStackObject(Size, Size);
-    SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i32);
-    SDOperand ST = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
-                               Op.getOperand(0), FI, DAG.getSrcValue(0));
-    
-    Op = DAG.getLoad(Op.getValueType(), ST, FI, DAG.getSrcValue(0));
-    
+    assert(Op.getOperand(0).getValueType() == MVT::i32);
+    Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op);
     // Convert the int value to FP in an FP register.
     return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op);
   }
diff --git a/llvm/lib/Target/SparcV8/SparcV8InstrInfo.td b/llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
index 2e8f2f60258..cccf6f1ad0d 100644
--- a/llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
+++ b/llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
@@ -69,6 +69,10 @@ SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT>,
 def SDTV8selectcc :
 SDTypeProfile<1, 4, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, 
                      SDTCisVT<3, i32>, SDTCisVT<4, FlagVT>]>;
+def SDTV8FTOI :
+SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisFP<1>]>;
+def SDTV8ITOF :
+SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
 
 def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTV8cmpicc>;
 def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc>;
@@ -78,8 +82,8 @@ def V8brfcc : SDNode<"V8ISD::BRFCC", SDTV8brcc, [SDNPHasChain]>;
 def V8hi    : SDNode<"V8ISD::Hi", SDTIntUnaryOp>;
 def V8lo    : SDNode<"V8ISD::Lo", SDTIntUnaryOp>;
 
-def V8ftoi  : SDNode<"V8ISD::FTOI", SDTFPUnaryOp>;
-def V8itof  : SDNode<"V8ISD::ITOF", SDTFPUnaryOp>;
+def V8ftoi  : SDNode<"V8ISD::FTOI", SDTV8FTOI>;
+def V8itof  : SDNode<"V8ISD::ITOF", SDTV8ITOF>;
 
 def V8selecticc : SDNode<"V8ISD::SELECT_ICC", SDTV8selectcc>;
 def V8selectfcc : SDNode<"V8ISD::SELECT_FCC", SDTV8selectcc>;
@@ -597,9 +601,9 @@ def FITOS : F3_3<2, 0b110100, 0b011000100,
                  "fitos $src, $dst",
                  [(set FPRegs:$dst, (V8itof FPRegs:$src))]>;
 def FITOD : F3_3<2, 0b110100, 0b011001000, 
-                 (ops DFPRegs:$dst, DFPRegs:$src),
+                 (ops DFPRegs:$dst, FPRegs:$src),
                  "fitod $src, $dst",
-                 [(set DFPRegs:$dst, (V8itof DFPRegs:$src))]>;
+                 [(set DFPRegs:$dst, (V8itof FPRegs:$src))]>;
 
 // Convert Floating-point to Integer Instructions, p. 142
 def FSTOI : F3_3<2, 0b110100, 0b011010001,
@@ -607,9 +611,9 @@ def FSTOI : F3_3<2, 0b110100, 0b011010001,
                  "fstoi $src, $dst",
                  [(set FPRegs:$dst, (V8ftoi FPRegs:$src))]>;
 def FDTOI : F3_3<2, 0b110100, 0b011010010,
-                 (ops DFPRegs:$dst, DFPRegs:$src),
+                 (ops FPRegs:$dst, DFPRegs:$src),
                  "fdtoi $src, $dst",
-                 [(set DFPRegs:$dst, (V8ftoi DFPRegs:$src))]>;
+                 [(set FPRegs:$dst, (V8ftoi DFPRegs:$src))]>;
 
 // Convert between Floating-point Formats Instructions, p. 143
 def FSTOD : F3_3<2, 0b110100, 0b011001001,