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| author | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:20:02 +0000 |
|---|---|---|
| committer | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:20:02 +0000 |
| commit | 5beef2d24287408c6172dd54831ac664fd89c923 (patch) | |
| tree | 18a666ce0477231e1f3d159a9d6a8535b9d0fce2 /llvm/lib | |
| parent | dbed9d42fd5b1a5be688d8a7709656da30b3bbbf (diff) | |
| download | bcm5719-llvm-5beef2d24287408c6172dd54831ac664fd89c923.tar.gz bcm5719-llvm-5beef2d24287408c6172dd54831ac664fd89c923.zip | |
Oops - correct broken disassembly for VMOV
llvm-svn: 159945
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 8164e90d0a3..c42edd53952 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -4226,7 +4226,7 @@ static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4); unsigned Rm = fieldFromInstruction32(Insn, 5, 1); unsigned pred = fieldFromInstruction32(Insn, 28, 4); - Rm |= fieldFromInstruction32(Insn, 0, 4) << 4; + Rm |= fieldFromInstruction32(Insn, 0, 4) << 1; if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F) S = MCDisassembler::SoftFail; |
