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authorReed Kotler <rkotler@mips.com>2013-12-11 03:32:44 +0000
committerReed Kotler <rkotler@mips.com>2013-12-11 03:32:44 +0000
commit5bde5c35f44beb94c8a9253cedc954d055f3b091 (patch)
treeb0b0fc214e2b8a47e60fb9952b086eaddde5be84 /llvm/lib
parent310b6c08baa1846964bf12bf22f7ca23c94ac592 (diff)
downloadbcm5719-llvm-5bde5c35f44beb94c8a9253cedc954d055f3b091.tar.gz
bcm5719-llvm-5bde5c35f44beb94c8a9253cedc954d055f3b091.zip
Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.
llvm-svn: 196999
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp8
-rw-r--r--llvm/lib/Target/Mips/Mips16InstrInfo.cpp12
2 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
index c23fc6a6ed0..82deec1a1e5 100644
--- a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
+++ b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
@@ -85,12 +85,20 @@ void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
O << "\t.set\tmips32r2\n";
break;
case Mips::Save16:
+ O << "\tsave\t";
+ printSaveRestore(MI, O);
+ O << " # 16 bit inst\n";
+ return;
case Mips::SaveX16:
O << "\tsave\t";
printSaveRestore(MI, O);
O << "\n";
return;
case Mips::Restore16:
+ O << "\trestore\t";
+ printSaveRestore(MI, O);
+ O << " # 16 bit inst\n";
+ return;
case Mips::RestoreX16:
O << "\trestore\t";
printSaveRestore(MI, O);
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
index 2df83e88506..7a3f9d2842c 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -1,3 +1,4 @@
+
//===-- Mips16InstrInfo.cpp - Mips16 Instruction Information --------------===//
//
// The LLVM Compiler Infrastructure
@@ -176,9 +177,10 @@ void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
bool SaveS2 = Reserved[Mips::S2];
MachineInstrBuilder MIB;
+ unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
if (isUInt<11>(FrameSize))
MIB = BuildMI(
- MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
+ MBB, I, DL, get(Opc)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addImm(FrameSize);
else {
@@ -186,7 +188,7 @@ void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
// returns largest possible n bit unsigned integer
int64_t Remainder = FrameSize - Base;
MIB = BuildMI(
- MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
+ MBB, I, DL, get(Opc)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addImm(Base);
if (isInt<16>(-Remainder))
@@ -206,9 +208,11 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
bool SaveS2 = Reserved[Mips::S2];
MachineInstrBuilder MIB;
+ unsigned Opc = ((FrameSize <= 128) && !SaveS2)?
+ Mips::Restore16:Mips::RestoreX16;
if (isUInt<11>(FrameSize))
MIB = BuildMI(
- MBB, I, DL, get(Mips::RestoreX16)).
+ MBB, I, DL, get(Opc)).
addReg(Mips::RA, RegState::Define).
addReg(Mips::S0, RegState::Define).
addReg(Mips::S1, RegState::Define).
@@ -222,7 +226,7 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
else
adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
MIB = BuildMI(
- MBB, I, DL, get(Mips::RestoreX16)).
+ MBB, I, DL, get(Opc)).
addReg(Mips::RA, RegState::Define).
addReg(Mips::S0, RegState::Define).
addReg(Mips::S1, RegState::Define).
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