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| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-11 07:16:00 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-11 07:16:00 +0000 |
| commit | 5b59e372dcb4776bd2acb4ae0c6438aead9fe7c2 (patch) | |
| tree | fdc2d75c2940e869064035fdec5ffcee03f24c2b /llvm/lib | |
| parent | 756f9d9c5119ac65d9d3b3d4caa7dc2674ad826a (diff) | |
| download | bcm5719-llvm-5b59e372dcb4776bd2acb4ae0c6438aead9fe7c2.tar.gz bcm5719-llvm-5b59e372dcb4776bd2acb4ae0c6438aead9fe7c2.zip | |
In 32-bit mode, mark 64-bit GPR's as unallocatable.
llvm-svn: 48217
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td index 93d2a510fbc..24402386c8e 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.td +++ b/llvm/lib/Target/X86/X86RegisterInfo.td @@ -415,6 +415,9 @@ def GR64 : RegisterClass<"X86", [i64], 64, GR64Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); const TargetRegisterInfo *RI = TM.getRegisterInfo(); + const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); + if (!Subtarget.is64Bit()) + return begin(); // None of these are allocatable in 32-bit. if (RI->hasFP(MF)) // Does the function dedicate RBP to being a frame ptr? return end()-2; // If so, don't allocate RSP or RBP else |
