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authorDavid Stenberg <david.stenberg@ericsson.com>2019-09-08 14:22:06 +0000
committerDavid Stenberg <david.stenberg@ericsson.com>2019-09-08 14:22:06 +0000
commit5a583665f4cbb13f41badb8357e65c6de1a61ee0 (patch)
tree9f0cad3de972f0aee51996f26616b3410710975a /llvm/lib
parent8b70139e95963e699a428d5c9fc5f1956370f39c (diff)
downloadbcm5719-llvm-5a583665f4cbb13f41badb8357e65c6de1a61ee0.tar.gz
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[DebugInfo][X86] Describe call site values for zero-valued imms
Summary: Add zero-materializing XORs to X86's describeLoadedValue() hook in order to produce call site values. I have had to change the defs logic in collectCallSiteParameters() a bit to be able to describe the XORs. The XORs implicitly define $eflags, which would cause them to never be considered, due to a guard condition that I->getNumDefs() is one. I have changed that condition so that we now only consider instructions where a forwarded register overlaps with the instruction's single explicit define. We still need to collect the implicit defines of other forwarded registers to remove them from the work list. I'm not sure how to move towards supporting instructions with multiple explicit defines, cases where forwarded register are implicitly defined, and/or cases where an instruction produces values for multiple forwarded registers. Perhaps the describeLoadedValue() hook should take a register argument, and we then leave it up to the hook to describe the loaded value in that register? I have not yet encountered a situation where that would be necessary though. Reviewers: aprantl, vsk, djtodoro, NikolaPrica Reviewed By: vsk Subscribers: ychen, hiraditya, llvm-commits Tags: #debug-info, #llvm Differential Revision: https://reviews.llvm.org/D67225 llvm-svn: 371333
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp34
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp5
2 files changed, 27 insertions, 12 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 5f02fab7a80..a3528f053ef 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -596,12 +596,13 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
bool ShouldTryEmitEntryVals = MBB->getIterator() == MF->begin();
DenseMap<unsigned, unsigned> RegsForEntryValues;
- // If the MI is an instruction defining a parameter's forwarding register,
- // add it into the Defs. If the MI clobbers more then one register, we use
- // the Defs in order to remove all the registers from
- // the ForwardedRegWorklist, since we do not support such situations now.
+ // If the MI is an instruction defining one or more parameters' forwarding
+ // registers, add those defines. We can currently only describe forwarded
+ // registers that are explicitly defined, but keep track of implicit defines
+ // also to remove those registers from the work list.
auto getForwardingRegsDefinedByMI = [&](const MachineInstr &MI,
- SmallVectorImpl<unsigned> &Defs) {
+ SmallVectorImpl<unsigned> &Explicit,
+ SmallVectorImpl<unsigned> &Implicit) {
if (MI.isDebugInstr())
return;
@@ -610,7 +611,10 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
Register::isPhysicalRegister(MO.getReg())) {
for (auto FwdReg : ForwardedRegWorklist) {
if (TRI->regsOverlap(FwdReg, MO.getReg())) {
- Defs.push_back(FwdReg);
+ if (MO.isImplicit())
+ Implicit.push_back(FwdReg);
+ else
+ Explicit.push_back(FwdReg);
break;
}
}
@@ -641,18 +645,24 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
if (ForwardedRegWorklist.empty())
return;
- SmallVector<unsigned, 4> Defs;
- getForwardingRegsDefinedByMI(*I, Defs);
- if (Defs.empty())
+ SmallVector<unsigned, 4> ExplicitFwdRegDefs;
+ SmallVector<unsigned, 4> ImplicitFwdRegDefs;
+ getForwardingRegsDefinedByMI(*I, ExplicitFwdRegDefs, ImplicitFwdRegDefs);
+ if (ExplicitFwdRegDefs.empty() && ImplicitFwdRegDefs.empty())
continue;
// If the MI clobbers more then one forwarding register we must remove
// all of them from the working list.
- for (auto Reg : Defs)
+ for (auto Reg : concat<unsigned>(ExplicitFwdRegDefs, ImplicitFwdRegDefs))
ForwardedRegWorklist.erase(Reg);
- if (I->getNumDefs() != 1)
+
+ // The describeLoadedValue() hook currently does not have any information
+ // about which register it should describe in case of multiple defines, so
+ // for now we only handle instructions where a forwarded register is (at
+ // least partially) defined by the instruction's single explicit define.
+ if (I->getNumExplicitDefs() != 1 || ExplicitFwdRegDefs.empty())
continue;
- unsigned Reg = Defs[0];
+ unsigned Reg = ExplicitFwdRegDefs[0];
if (auto ParamValue = TII->describeLoadedValue(*I)) {
if (ParamValue->first.isImm()) {
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 7657db76915..809f93ed602 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7547,6 +7547,11 @@ X86InstrInfo::describeLoadedValue(const MachineInstr &MI) const {
return ParamLoadedValue(*Op, Expr);;
}
+ case X86::XOR32rr: {
+ if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg())
+ return ParamLoadedValue(MachineOperand::CreateImm(0), Expr);
+ return None;
+ }
default:
return TargetInstrInfo::describeLoadedValue(MI);
}
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