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| author | Craig Topper <craig.topper@intel.com> | 2018-04-30 06:21:24 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-30 06:21:24 +0000 |
| commit | 5a4c88005c1cafe95bbf0117f0a3900a78742080 (patch) | |
| tree | 965ed0c7bcb9aa3f8a1831c9aa84dfc4d0d453df /llvm/lib | |
| parent | d94002c4147032fa7135a2e310383a388a498512 (diff) | |
| download | bcm5719-llvm-5a4c88005c1cafe95bbf0117f0a3900a78742080.tar.gz bcm5719-llvm-5a4c88005c1cafe95bbf0117f0a3900a78742080.zip | |
[X86] Add a Requires<[In64BitMode]> to FARJMP64
Otherwise we can try to assemble it in 32-bit mode and throw an assert in the encoder.
llvm-svn: 331161
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrControl.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrControl.td b/llvm/lib/Target/X86/X86InstrControl.td index b7ad0feabd9..5fc5d5dc1d2 100644 --- a/llvm/lib/Target/X86/X86InstrControl.td +++ b/llvm/lib/Target/X86/X86InstrControl.td @@ -178,7 +178,7 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { OpSize32, Sched<[WriteJump]>; } def FARJMP64 : RI<0xFF, MRM5m, (outs), (ins opaque80mem:$dst), - "ljmp{q}\t{*}$dst", []>, Sched<[WriteJump]>; + "ljmp{q}\t{*}$dst", []>, Sched<[WriteJump]>, Requires<[In64BitMode]>; let AsmVariantName = "att" in def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst), |
